| Wednesday, January 26, | Time : 9:30 - 10:30, | Room : 503 |
| The Impact of Communications Convergence on Silicon Integrated Circuits |
| Shojiro Asai |
| Corporate Officer and President, Research & Development Group, Hitachi Ltd., Japan |
| Thursday, January 27, | Time : 9:00 - 10:00, | Room : 503 |
| Research, Design, and Fabrication - Brain Power, Tool Power, and Electric Power |
| C. L. Liu |
| President, National Tsing Hua Univ., Hsin-Chu, Taiwan |
| Friday, January 28, | Time : 9:00 - 10:00, | Room : 503 |
| Design Challenges in Multi-GHz Microprocessors |
| Bill Herrick |
| Director, Alpha Microprocessor Development, Compaq Computer Corp., USA |
| Wednesday, January 26, | Time : 10:45 - 12:15, | Room : 503 |
| Organizer : | Kenji Yoshida Toshiba Corp., Japan |
| Moderator : | Ron Collett Collett International, Inc., USA |
| Panelists : | Aart de Geus Synopsys, Inc., USA Shane Robison Cadence Design Systems, Inc. USA Wally Rhinse Mentor Graphics Corp., USA Jinya Katsube Zuken Inc., Japan Penny Herscher Simplex, Inc., USA Guido Arnout CoWare, Inc., USA |
| Wednesday, January 26, | Time : 13:30 - 15:30, | Room : 502 |
| Session A1 : | (Special Session) University LSI Design Contest |
| Chair : | Ryota Kasai NTT, Japan |
| Co-Chair : | Anantha Chandrakasan MIT, USA |
| Wednesday, January 26, | Time : 16:00 - 18:00, | Room : 411/412 |
| Session A2 : | (Special Session) CAD for Embedded Systems |
| Chair : | Miodrag Potkonjak Univ. of California, Los Angeles, USA |
| A2.1 | "Offline Program Re-mapping to Improve Branch Prediction Efficiency in Embedded Systems" Stephen S. Brown, Jeet Asher, William H. Mangione-Smith Univ. of California, Los Angeles, USA |
| A2.2 | "Timing Driven Co-design of Networked Embedded Systems" Dinesh Ramanathan, Ravindra Jejurikar, Rajesh K. Gupta Univ. of California, Irvine, USA |
| A2.3 | "Low-power Design Methodology and Applications utilizing Dual Supply Voltages" Kimiyoshi Usami, Mutsunori Igarashi Toshiba Corp., Japan |
| A2.4 | "Co-Synthesis with custom ASICs" Yuan Xie, Wayne Wolf Princeton University, USA |
| Wednesday, January 26, | Time : 16:00 - 18:00, | Room : 413 |
| Session E2 : | (Special Session) System-In-Package (SIP) |
| Chair : | Wayne W.-M. Dai Univ. of California, Santa Cruz, USA |
| E2.1 | "System-In-Package (SIP) : Challenges and Opportunities" King L. Tai Bell Laboratories, Lucent Technologies, USA |
| E2.2 | "Taiwan Foundary for System-In-Package (SIP)" Albert Lin APack, Inc., Taiwan |
| E2.3 | "Integration of Large-Scale FPGA and DRAM in a Package Using Chip-On-Chip Technology" Michael X. Wang, Katsuharu Suzuki, Wayne W.-M. Dai Univ. of California, Santa Cruz, USA Yee L. Low, Kevin J. O'conner, King L. Tai Bell Laboratories, Lucent Technology, USA |
| E2.4 | "Modeling and Analysis of Integrated Spiral Inductors for RF System-In-Package (SIP)" Minqing Liu, Wayne W.-M. Dai Univ. of California, Santa Cruz, USA |
| Thursday, January 27, | Time : 13:30 - 15:30, | Room : 433/434 |
| Session D4 : | (Panel Discussion) Timing Closure : The Solution and Its Problems |
| Organizer : | Ralph H.J.M. Otten Delft University of Technology, The Netherlands |
| Moderator : | Ralph H.J.M. Otten Delft University of Technology, The Netherlands |
| Panelists : | Raul Camposano Synopsys, Inc., USA Oliver Coudert Monterey Design Systems, Inc., USA Patrick Groeneveld Magma Design Automation, USA Leon Stok Thomas J. Watson Research Center, IBM, USA |
| Friday, January 28, | Time : 13:30 - 15:30, | Room : 501 |
| Session B7 : | (Special Session) Future of System Level Design Languages |
| Chair : | Masaharu Imai Osaka Univ., Japan |
| B7.1 | "SLDL and Rosetta" Steven Schulz Texas Instruments, Inc., USA |
| B7.2 | "SystemC Standard" Guido Arnout Co-Ware, Inc., USA |
| B7.3 | "Java based object oriented hardware specification and synthesis" Tommy Kuhn, Wolfgang Rosenstiel Univ. of Tuebingen, Germany |
| B7.4 | "Superlog, A Unified Design Language for System-on-chip" Peter Flake, Simon J. Davidmann Co-Design Automation, Inc., USA |
| Friday, January 28, | Time : 13:30 - 15:30, | Room : 433/434 |
| Session D7 : | (Panel Discussion) Industry-Academia Cooperation |
| Organizer : | Tokinori Kozawa STARC, Japan |
| Moderator : | Hiroto Yasuura Kyushu Univ., Japan |
| Panelists : | Ivo Bolson IMEC, Belgium Yuon-Long Lin National Tsing Hua Univ., Taiwan Toshiaki Masuhara Hitachi Ltd., Japan Jan Rabaey Univ. of California, Berkeley, USA Leon Stok Thomas J. Watson Research Center, IBM, USA |
| Friday, January 28, | Time : 16:00 - 17:30, | Room : 501 |
| Session B8 : | (Panel Discussion) One Language or More? (How Can We Design an SoC at a System Level?) |
| Organizer : | Masaharu Imai Osaka Univ., Japan |
| Moderator : | Gary Smith Dataquest, USA |
| Panelists : | Steven Schulz [SLDL] Texas Instruments, Inc., USA Karen Bartleson [SystemC] Synopsys, Inc., USA Daniel D. Gajski [SpecC] Univ. of Calfornia, Irvine, USA Wolfgang Rosenstiel [Java] Univ. of Tuebingen, Germany Peter Flake [Superlog] Co-Design Automation, Inc., USA Hiroto Yasuura [C/C++] Kyushu Univ., Japan Masaharu Imai [VHDL] Osaka Univ., Japan |
| Wednesday, January 26, | Time: 13:30 - 14:00, | Room: 501 |
| B1.1 | "Essential Issues for IP Reuse" Daniel D. Gajski Univ. of California, Irvine, USA Viraphol Chaiyakul Y Explorations Inc., USA Allen C.-H. Wu Tsing Hua University, Taiwan Shojiro Mori Toshiba Corp., Japan Tom Nukiyama NEC Corp., Japan Larry Rosenberg VSIA, USA |
| Wednesday, January 26, | Time: 16:00 - 17:00, | Room: 431/432 |
| C2.1 | "Synthesis Challenges for Next-Generation High-Performance and High-Density PLDs" Jason Cong Univ. of California, Los Angeles, USA Songjie Xu Aplus Design Technologies, Inc., USA |
| Thursday, January 27, | Time: 11:30 - 12:00, | Room: 413 |
| E3.3 | "Subwavelength Lithography Technologies (PSM, OPC)" Tsuneo Terasawa Hitachi Ltd., Japan |
| Thursday, January 27, | Time: 13:30 - 14:30, | Room: 411/412 |
| A4.1 | "IC Design Technology for Building System-On-A-Chip" Rajesh Gupta Univ. of California, Irvine, USA |
| Thursday, January 27, | Time: 14:30 - 15:30, | Room: 501 |
| B4.3 | "Reconfigurable Computing: Its Concept and a Practical Embodiment using Newly Developed Dynamically Reconfigurable Logic (DRL) LSI" Masakazu Yamashina, Masato Motomura NEC Corp., Japan |
| Thursday, January 27, | Time: 14:30 - 15:30, | Room: 413 |
| E4.3 | "Design for Manufacturability" Andrzej J. Strojwas Carnegie Mellon Univ., USA |
| Thursday, January 27, | Time: 16:00 - 17:00, | Room: 411/412 |
| A5.1 | "Low-Power Silicon Architectures for Wireless Communications" Jan Rabaey Univ. of California, Berkeley, USA |
| Thursday, January 27, | Time: 16:00 - 17:00, | Room: 501 |
| B5.1 | "Multilanguage System Design" Rolf Ernst Technical University Braunschweig, Germany Ahmed A. Jerraya TIMA Laboratory, France |
| Friday, January 28, | Time: 11:00 - 11:30, | Room: 431/432 |
| C6.2 | "Fault models and test generation for IDDQ Testing" Yoshinobu Higami Ehime Univ., Japan Kewal K. Saluja Univ. of Wisconsin Yuzo Takamatsu Ehime Univ., Japan Kozo Kinoshita Osaka Univ., Japan |
| Friday, January 28, | Time: 11:30 - 12:00, | Room: 431/432 |
| C6.3 | "Issues on SOC Testing in DSM Era" Takashi Aikyo Fujitsu Ltd., Japan |
| Friday, January 28, | Time: 13:30 - 14:30, | Room: 411/412 |
| A7.1 | "Design Challenges for 0.1um and Beyond" Takayasu Sakurai Univ. of Tokyo, Japan |
| Friday, January 28, | Time: 14:30 - 15:30, | Room: 413 |
| E7.3 | "Substrate Crosstalk Analysis in Mixed Signal CMOS Integrated Circuits" Makoto Nagata, Atsushi Iwata Hiroshima Univ., Japan |
| Friday, January 28, | Time: 16:00 - 16:30, | Room: 411/412 |
| A8.1 | "Importance of CAD Tools and Methodology in High Speed CPU Design" Haruyuki Tago, Kazuhiro Hashimoto, Nobuyuki Ikumi, Masato Nagamatsu Toshiba Corp., Japan Yasuyuki Yamamoto, Masakazu Suzuoki Sony Computer Entertainment, Japan |