ASP-DAC 2001 At A Glance

TUESDAY, JANUARY 30

FULL-DAY Tutorials

 

TUTORIAL 1 (9:30 - 17:00) Room 311/312

SpecC: Specification Language and Design Methodology

TUTORIAL 2 (9:30 - 17:00) Room 313/314

Software Development Methods for Embedded Systems

TUTORIAL 3 (9:30 - 17:00) Room 411/412

Timing Closure for Ultra Deep Submicron Designs

TUTORIAL 4 (9:30 - 17:00) Room 414/415

IP Authoring and SOC Integration, Verification, and Testing

TUTORIAL 5 (9:30 - 17:00) Room 416/417

Design and Tools for Networked System-on-Chip

 

ASP-DAC 2001 At A Glance

WEDNESDAY, JANUARY 31

 

Room

301

Room

302

Room

311/312

Room

313/314

 

 

 

Opening Session (Room 303/304)

 

 

Keynote Address I (Room 303/304)

 

Coffee Break

 

Executive Panel Discussion : (Room 303/304)

 

Secrets to Success in a Start-Up EDA Business

 

Lunch

A1

University LSI Design Contest

 

B1

Device/Circuit Co-designing for Advanced Technologies

C1

System Level Specification and Simulation

D1

Issues in BDD and Sequential Verification

 

 

 

Coffee Break

A2

Interconnect Design Optimization(I)

 

B2

Design for Manufacturability

C2

System Level Design

D2

Important Problems in Equivalence Checking

 

 

 

 

ASP-DAC 2001 At A Glance

THURSDAY, FEBRUARY 1

 

Room

301

Room

302

Room

311/312

Room

313/314

Room

303

 

Keynote Address II (Room 303/304)

 

Coffee Break

A3

Interconnect Design Optimization(II)

 


B3

Parasitic Extraction and Reduced Order Model

 


C3

Functional Decomposition and PLA based Logic Synthesis

 


D3

Low Power Techniques for Embedded Software

 



E3

Asynchronous System Design

Architecture and Low Power Design

Lunch

A4

(Panel)

To Be Announced

B4

Analog Design Methodology

C4

Low Power Design Methodology

D4

Advanced BIST :

Methodology and Applications

E4

Asynchronous System Design

Verification

Coffee Break

A5

DSM Design and Analysis

B5

Signal Integrity and Analysis

C5

Design Experiments for Mobile Applications

D5

Compilation Techniques for Embedded Software

E5

Asynchronous System Design

Synthesis

 

Banquet

 

ASP-DAC 2001 At A Glance

FRIDAY, FEBRUARY 2

 

Room

301

Room

302

Room

311/312

Room

313/314

 

 

 

Keynote Address III (Room 303/304)

 

Coffee Break

A6

(Invited Talk)
Design Technology Productivity in the DSM Era

B6

System Level Power Optimization

C6

Multi-level Logic Optimization for Logic Circuits

D6

Practical and High Level DFT

 

Lunch

A7

Performance Driven Floorplanning and Place ment(I)

B7

Improving Delay and Power Estimation

C7

Networked Reconfiguration and Systems

D7

Advances in Timing Optimization of Logic Circuits

 

Coffee Break

A8

Performance Driven Floorplanning and Place ment(II)

B8

Logic Synthesis for Low Power and Design Space Exploration

C8

Optimization Technique for FPGAs

D8

Processor Synthesis