ASP-DAC 2001 At A Glance |
TUESDAY, JANUARY 30 |
FULL-DAY Tutorials |
TUTORIAL 1 (9:30 - 17:00) Room 311/312 |
SpecC: Specification Language and Design Methodology |
TUTORIAL 2 (9:30 - 17:00) Room 313/314 |
Software Development Methods for Embedded Systems |
TUTORIAL 3 (9:30 - 17:00) Room 411/412 |
Timing Closure for Ultra Deep Submicron Designs |
TUTORIAL 4 (9:30 - 17:00) Room 414/415 |
IP Authoring and SOC Integration, Verification, and Testing |
TUTORIAL 5 (9:30 - 17:00) Room 416/417 |
Design and Tools for Networked System-on-Chip |
ASP-DAC 2001 At A Glance |
WEDNESDAY, JANUARY 31 |
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Room 301 |
Room 302 |
Room 311/312 |
Room 313/314 |
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Opening Session (Room 303/304)
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Keynote Address I (Room 303/304)
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Coffee Break | ||||
Executive Panel Discussion : (Room 303/304)
Secrets to Success in a Start-Up EDA Business
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Lunch | ||||
University LSI Design Contest
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Device/Circuit Co-designing for Advanced Technologies |
System Level Specification and Simulation |
Issues in BDD and Sequential Verification |
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Coffee Break | ||||
Interconnect Design Optimization(I)
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Design for Manufacturability |
System Level Design |
Important Problems in Equivalence Checking |
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ASP-DAC 2001 At A Glance |
THURSDAY, FEBRUARY 1 |
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Room 301 |
Room 302 |
Room 311/312 |
Room 313/314 |
Room 303 |
Keynote Address II (Room 303/304)
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Coffee Break | ||||
Interconnect Design Optimization(II)
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Parasitic Extraction and Reduced Order Model
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Functional Decomposition and PLA based Logic Synthesis
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Low Power Techniques for Embedded Software
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Asynchronous System Design Architecture and Low Power Design |
Lunch | ||||
(Panel) To Be Announced |
Analog Design Methodology |
Low Power Design Methodology |
Advanced BIST : Methodology and Applications |
Asynchronous System Design Verification |
Coffee Break | ||||
DSM Design and Analysis |
Signal Integrity and Analysis |
Design Experiments for Mobile Applications |
Compilation Techniques for Embedded Software |
Asynchronous System Design Synthesis |
Banquet |
ASP-DAC 2001 At A Glance |
FRIDAY, FEBRUARY 2 |
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Room 301 |
Room 302 |
Room 311/312 |
Room 313/314 |
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Keynote Address III (Room 303/304)
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Coffee Break | ||||
(Invited Talk) |
System Level Power Optimization |
Multi-level Logic Optimization for Logic Circuits |
Practical and High Level DFT |
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Lunch | ||||
Performance Driven Floorplanning and Place ment(I) |
Improving Delay and Power Estimation |
Networked Reconfiguration and Systems |
Advances in Timing Optimization of Logic Circuits |
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Coffee Break | ||||
Performance Driven Floorplanning and Place ment(II) |
Logic Synthesis for Low Power and Design Space Exploration |
Optimization Technique for FPGAs |
Processor Synthesis |
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