Organizing Committee

Last Updated: 19 December 2000

General Chair

Satoshi Goto

NEC Corporation

4-1-1 Miyazaki, Miyamae-ku, Kawasaki 216-8555 Japan

Phone: +81-44-856-2006 FAX: +81-44-856-2021

sgoto@rdg.cl.nec.co.jp

 

 

Secretaries

Masaaki Yamada Toshiba Corporation mm.yamada@toshiba.co.jp
Takeshi Yoshimura NEC Corp. yoshi@ccm.cl.nec.co.jp

 


Past Gen. Chair Kenji Yoshida Semiconductor Technology Academic Research Center
Steering Committee Chair Tatsuo Ohtsuki Waseda University
Assistant Secretary Kazutoshi Wakabayashi NEC Corp.
TPC Co-Chairs Hiroto Yasuura Kyushu University
Ravi Pai Silicon Automation Systems Ltd.
TPC Vice Chair Masaharu Imai Osaka University
TPC Secretaries Hiroshi Date Institute of Systems Information Technologies KYUSHU
Tohru Ishihara The University of Tokyo
Design Contest Co-Chairs Hidetoshi Onodera Kyoto University
S. K. Nandy Indian Institute of Science
Design Contest Vice Chair Tadahiro Kuroda Keio University
Tutorial Co-Chairs Hidekazu Terai Ritsumeikan University
Nachiket Urdhwareshe Silicon Automation Systems Ltd.
Tutorial Vice Chair Yusuke Matsunaga Fujitsu Laboratories Limited
Finance Chair Osamu Yamashiro Hitachi, Ltd.
Publicity Chair Tetsuya Fujimoto SHARP Corp.
Publication Chair Kiyoharu Hamaguchi Osaka University
Audio Visual Chair Katsuhiko Seo Mitsubishi Electric Corp.
Local Arrangement Chair Takahiro Kobori OKI Electric Industry Co., Ltd.
Registration Chair Masato Ikeda Sony Corp.
Promotion Chair Hiroyuki Ochi Hiroshima City University
Marketing Advisory Chair Naoya Tohyama Cadence Design Systems, Japan
eD&S Fair Chair Yoshimune Hagiwara Hitachi, Ltd.
ASP-DAC Rep. at DAC Hidetoshi Onodera Kyoto University
ASP-DAC Rep. at DATE Tokinori Kozawa Semiconductor Technology Academic Research Center
IEICE/TGICD Rep. Norihisa Kitagawa Texas Instruments Japan
IEICE/TGCAS Rep. Hisakazu Kikuchi Niigata University
IEICE/TGVLD Rep. Hidetoshi Onodera Kyoto University
IPSJ/SIGDA Rep. Hirofumi Hamamura Fujitsu Limited
JIEP Rep. Masao Yanagisawa Waseda University
EIAJ/EDA TC Rep. Yoshifumi Okamoto Matsushita Electric Industrial Co., Ltd.


ASP-DAC 2001 SECRETARIAT
c/o Japan Electronics Show Association
Sumitomo Shibadaimon Bldg. 2-gokan, 5F
1-12-16 Shibadaimon, Minato-ku, Tokyo 105-0012 Japan
Tel: +81-3-5402-7601 Fax: +81-3-5402-7605
aspdac@jesa.or.jp

 

 

 

 

Technical Program Committee

Co-Chairs

Hiroto Yasuura Kyushu Univ., Japan yasuura@c.csce.kyushu-u.ac.jp
Ravi Pai Silicon Automation Systems, India pai@sasi.com

Vice Chair

Masaharu Imai Osaka Univ., Japan imai@ics.es.osaka-u.ac.jp

Secretaries

Hiroshi Date Institute of Systems Information & Technologies KYUSHU, Japan date@k-isit.or.jp
Tohru Ishihara Univ. of Tokyo, Japan ishihara@silicon.u-tokyo.ac.jp

Subcommittees

(* indicates the subcommittee chair.)

 

  1. System Design Methodology

    *Yoshinori Takeuchi Osaka Univ., Japan
    Rajesh Gupta UC Irvine, USA
    Tadatoshi Ishii Toshiba, Japan
    Nagisa Ishiura Osaka Univ., Japan
    Tsuyoshi Isshiki Tokyo Institute of Technology, Japan
    Ahmed Amine Jerraya TIMA, France
    Koichi Sato NEC, Japan
    Nozomu Togawa Waseda Univ., Japan
    Hiroyuki Tomiyama UC Irvine, USA
    Serge Vernalde IMEC, Belgium
    Masayuki Yamaguchi SHARP, Japan

     

  2. Synthesis and Verification in Logic Design

    *Masahiro Fujita Univ. of Tokyo, Japan
    Shih-Chieh Chang National Chung-Cheng Univ., Taiwan
    Supratik Chakraborty IIT Bombay, India
    Ed Clarke CMU, USA
    Hans Eveking Technical Univ. of Darmstadt, Germany
    Jing-Yang Jou National Chiao Tung Univ., Taiwan
    Rajeev Murgai Fujitsu Labs of America, USA
    S. Ramesh IIT Bombay, India
    Hiroshi Sawada NTT, Japan
    Yutaka Tamiya Fujitsu Lab., Japan
    Tiziano Villa Parades, Italy
    Ching-Wei National Chung-Cheng Univ., Taiwan
    Tomohiro Yoneda Tokyo Institute of Technology, Japan

     

  3. Optimization and Verification in Physical Design

    *Masahiro Fukui Matsushita, Japan
    Yao-Wen Chang National Chiao Tung Univ., Taiwan
    Ikuo Harada ATR, Japan
    Xianlong Hong Tsinghua Univ., China
    Masanori Imai STARC, Japan
    Tomonori Izumi Kyoto Univ., Japan
    Tetsushi Koide Univ. of Tokyo, Japan
    Takumi Okamoto NEC, Japan
    Shunji Saika Matsushita, Japan
    Hyunchul Shin Hanyang Univ., Korea
    Yoichi Shiraishi Gunma Univ., Japan
    C. K. Wong The Chinese Univ. of Hong Kong, Hong Kong

     

  4. Test Technology and Design for Testability

    *Seiji Kajihara Kyushu Inst. of Tech, Japan
    Kwang-Ting (Tim) Cheng UC Santa Barbara, USA
    Hiroshi Date ISIT, Japan
    Kazumi Hatayama Hitachi, Japan
    Tomoo Inoue Hiroshima City Univ., Japan
    Yukiya Miura Tokyo Metropolitan Univ., Japan
    Chauchin Su National Central Univ. Taiwan
    Cheng-Wen Wu National Tsing Hua Univ. Taiwan
    Masaaki Yoshida NEC, Japan

     

  5. Analog Circuit Design

    *Kimihiro Ogawa Sony LSI, Japan
    Akira Hyogo Science Univ. of Tokyo, Japan
    Yasuaki Inoue Univ. of East Asia, Japan
    Kenneth S. Kundert Cadence, USA
    Toshiyuki Saito NEC, Japan
    Akio Ushida Tokushima Univ., Japan
    Chorng-kuang Wang National Taiwan Univ., Taiwan
    Jacob White MIT, USA
    Goichi Yokomizo Hitachi, Japan

     

  6. Design for Manufacturability (TCAD)

    *Mitiko Miura-Mattausch Hiroshima Univ., Japan
    Uwe Feldmann Infineon Technologies, Germany
    Boon-Khim Liew TSMC, Taiwan
    Hiroo Masuda STARC, Japan
    Hiroshi Matsumoto NEC, Japan
    Mikako Miyama Hitachi, Japan
    Kiyoshi Ishikawa Mitsubishi, Japan
    Naoyuki Shigyo Toshiba, Japan
    T. Toyabe Toyo Univ., Japan

     

  7. Embedded Systems and Software

    *Hiroaki Takada Toyohashi Univ. of Technology, Japan
    Naehyuck Chang Seoul National Univ., Korea
    Pai H. Chou UC Irvine, USA
    Rolf Ernst TU Braunshweig, Germany
    Ing-Jer Huang National Sun-Yat-Sen Univ., Taiwan
    Peter Marwedel Univ. of Dortmund, Germany
    Hiroshi Monden NEC, Japan
    Tatsuo Nakajima Waseda Univ., Japan
    Shigeki Nankaku Mitsubishi, Japan
    Kiichiro Tamaru Toshiba, Japan

     

  8. Reconfigurable Systems

    *Hiroto Yasuura Kyushu Univ., Japan
    Hideaharu Amano Keio Univ., Japan
    Kiyoung Choi Seoul National Univ. Korea
    Reiner Hartenstein Kaiserslautern Univ., Germany
    Toshiaki Miyazaki NTT, Japan
    Sri Parameswaran The University Of Queensland, Australia
    Barry Shackleford HP Lab, USA
    Allen C.-H. Wu Tsing Hua University, Taiwan

     

  9. Design Experiments

    *Masakatsu Yamashina NEC, Japan
    Shekhar Borkar Intel, USA
    Tadahiro Kuroda Keio Univ., Japan
    Masataka Matsui Toshiba, Japan
    Hiroyuki Mizuno Hitachi, Japan
    Satoshi Matsushita NEC, Japan

University LSI Design Contest Committee

Co-Chairs

Hidetoshi Onodera Kyoto Univ., Japan onodera@kuee.kyoto-u.ac.jp
S. K. Nandy Indian Institute of Science, India nandy@serc.iisc.emet.in

Vice Chair

Tadahiro Kuroda Keio Univ., Japan kuroda@elec.keio.ac.jp

 


Hideharu Amano Keio Univ., Japan
Takafumi Aoki Tohoku Univ., Japan
Tadayoshi Enomoto Chuo Univ., Japan
Akira Hyogo Science Univ. of Tokyo, Japan
Makoto Ikeda Univ. of Tokyo, Japan
Shoji Kawahito Shizuoka Univ., Japan
Koji Kotani Tohoku Univ., Japan
Hajime Kubosawa Fujitsu, Japan
Masataka Matsui Toshiba, Japan
Yasuyuki Matsuya NTT, Japan
Hiroyuki Mizuno Hitachi, Japan
Masato Motomura NEC, Japan
Kazuaki Murakami Kyushu Univ., Japan
Makoto Nagata Hiroshima Univ., Japan
Borivoje Nikolic UC Berkeley, USA
Vojin G. Oklobdzija UC Davis, USA
Takao Onoye Kyoto Univ., Japan
In-Cheol Park KAIST, Korea
Kazuo Taki Kobe Univ., Japan
Chi-Ying Tsui Hong Kong Univ. of Science and Technology, Hong Kong
Toshiro Tsukada Hitachi, Japan
Ingrid Verbauwhede UCLA, USA
Tomohisa Wada Univ. of Ryukyus, Japan
Kazuyoshi Waki Rohm, Japan
Hoi-Jun Yoo KAIST, Korea

 

 

Steering Committee

Chair

Tatsuo Ohtsuki

Dept. of Electronics, Information & Communication Engineering
Waseda University

3-4-1 Okubo, Shinjuku, Tokyo 169-8555 Japan

Tel: +81-3-5286-3387 Fax: +81-3-3203-9184

to@ohtsuki.comm.waseda.ac.jp

Vice Chair Secretary
Fumiyasu Hirose Tsuneo Nakata
Cadence Design Systems, Japan Fujitsu Laboratories Ltd.
hirose@cadence.com nakata@flab.fujitsu.co.jp


ASP-DAC 2000 General Chair Kenji Yoshida Semiconductor Technology Academic Research Center (STARC)
ASP-DAC 2001 General Chair Satoshi Goto NEC Corporation
ACM SIGDA Representative Nikil Dutt University of California at Irvine
IEEE CAS Representative Ellen J. Yoffa IBM Corporation
DAC Representative Jan M. Rabaey University of California at Berkeley
DATE Representative Peter Marwedel University of Dortmund
EIAJ EDA TC Representative Yoshifumi Okamoto Matsushita Electric Industrial Co., Ltd.
STARC Representative Tokinori Kozawa Semiconductor Technology Academic Research Center (STARC)
eD&S Fair Chair Yoshimune Hagiwara Hitachi Limited
IEICE TGCAS Chair Hisakazu Kikuchi Niigata University
IEICE TGVLD Chair Hidetoshi Onodera Kyoto University
IEICE TGICD Chair Nori Kitagawa Texas Instruments, Japan
IPSJ SIGSLDM Chair Hirofumi Hamamura Fujitsu Limited
JIEP Representative Masao Yanagisawa Waseda University

International Members

Richard M M Chen City University of Hong Kong
Graham R. Hellestrand VaST Systems Technology Corporation
Xian-Long Hong Tsinghua University, Beijing
Chong-Min Kyung Korea Advanced Institute of Science and Technology
Hon-Wai Leong National University of Singapore
Youn-Long Steve Lin Tsing Hua University, Hsin-Chu
Sunil D. Sherlekar Silicon Automation Systems (INDIA) PVT. LTD.
David Skellern Macquarie University
Alexander Stempkovsky Russin Academy of Sciences
Qianling Zhang Fudan University