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                           2nd CALL FOR PAPERS

                               ASP-DAC 2004
        (Asia and South Pacific Design Automation Conference 2004)

                          http://www.aspdac.com/

                    Pacifico Yokohama, Yokohama, JAPAN
                          January 27 - 30, 2004


           Deadline for submission:     July     16 (Wed), 2003
           Notification of acceptance:  October  10 (Fri), 2003
           Deadline for final version:  November 20 (Thu), 2003

                  Specification of the paper submission
                format will be available at our WEB site.

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[Aims of the Conference]

ASP-DAC 2004 is the 9th in a series of annual international
conferences on VLSI design automation.  Asia and South Pacific region is
one of the most active regions of design and fabrication of silicon
chips in the world. The conference aims are providing the Asian and
South Pacific CAD/DA and Design community with opportunities of
interchanging ideas and collaboratively discussing the directions of the
technologies related to all of Electronic Design Automation (EDA). The
goal of the conference is to provide a forum for presentation,
discussion, and observation of the state-of-the-art of EDA technologies
and design methodologies of electronic systems. The format of the
meeting intends to cultivate and promote an instructive and productive
interchange among EDA researchers/developers, and system/circuit/device
designers. A wide variety of those scientists, engineers, and students
who are interested in theoretical issues on EDA are also welcome.

[Area of Interest]

Original papers on, but not limited to, the following areas are invited.

[1] System Level Design Methodology:
System LSI and SoC design methods, System specification, Specification
languages, Design languages, Design reuse and IPs, Rapid prototyping,
Low power system design, etc.

[2] Embedded and Real-Time Systems:
Co-simulation, Co-verification, Compilation techniques,
Hardware-software co-design, Real-time OS and middleware, Design
languages for embedded systems, etc.

[3] Behavioral/Logic Synthesis and Optimization: Behavioral/RT
synthesis, Optimization techniques in logic design, Library mapping,
Interaction between logic design and layout, IP-core design,
Sequential and asynchronous logic synthesis, Hardware algorithms, etc.

[4] Validation and Verification for Behavioral/Logic Design:
Logic simulation, Simulation engine, Symbolic simulation, Formal
verification, Binary decision diagram, Equivalence checking,
Transaction-level/RTL and gate-level modeling and validation, etc.

[5] Optimization and Verification in Circuit and Chip: Circuit
modeling, Circuit simulation, Cell library characterization and
generation, Circuit extraction, Verification, Circuit
characterization, Clock/Power/Ground distribution, Signal integrity
issues, etc.

[6] Performance Driven Physical Design:
Physical synthesis, Floor-planning, Buffer optimization and planning,
Wire optimization and planning, Partitioning, Placement, Global/Detail
routing, Module generation, New layout algorithms, Interconnect
issues, etc.

[7] Test Technology and Design for Testability:
Test design, Test pattern generation, BIST, Fault simulation, Fault
modeling, Test method for core-based design, Test issues on IP cores,
Memory testing, LSI tester, etc.

[8] Analog and RF Circuit Design:
Analog circuit synthesis, Analog layout, Verification, Simulation
techniques, Noise analysis, Analog circuit testing, Analog digital
mixed design, etc.

[9]  Design for Manufacturability (TCAD):
Device modeling, Device simulation, Parameter extraction, Process
modeling, Process simulation, Yield optimization, Device testing, etc.

[10]  Reconfigurable Systems:
Field-programmable gate array (FPGA) design, FPGA design tools, Novel
reconfigurable systems, Mapping techniques for reconfigurable systems,
Application of reconfigurable systems, etc.

[11] Leading-Edge Design Experiments:
Microprocessors, Digital signal processors, Design for multimedia, %
System LSIs, SoC, Design for Wireless communication, A/D mixed
circuits, Memories, Sensors, MEMS chips, New applications, etc.

[Submission of Papers]

Deadline for submission:     July     16 (Wed), 2003
Notification of acceptance:  October  10 (Fri), 2003
Deadline for final version:  November 20 (Thu), 2003

Specification of the paper submission format will be available at our WEB site:
http://www.aspdac.com/

[Paper types]

Papers will be accepted for publication as either of regular papers,
short papers or poster papers. The paper type ** cannot ** be chosen
by authors when submitted.

[Panels, Special Sessions and Tutorials]

Suggestions and proposals are welcome and have to be addressed to the
Conference Secretariat (See the email address below) no later than ** June
2(Mon), 2003 **.

[Prospective Sponsors]

ACM SIGDA, IEEE Circuits and Systems Society, IEICE ESS(Institute of
Electronics, Information and Communication Engineers, Engineering
Sciences Society), IPSJ SLDM (Information Processing Society of Japan,
SIG System LSI Design Methodology)

[ASP-DAC 2004 Chairs]

General Chair: 
   Masaharu Imai (Osaka Univ., Japan)
Technical Program Co-Chairs:
   Hidekazu Terai (Ritsumeikan Univ., Japan), 
   Nikil Dutt (U.C. Irvine, U.S.A.),
   Xianlong Hong (Tsinghua Univ., China)
Technical Program Vice Chairs:
   Masahiro Fujita (Univ. of Tokyo., Japan)
Tutorial Co-Chairs:
   Shinji Kimura (Waseda Univ, Japan), 
   Yang Haigang (Lattice Semiconductor, U.K.)

[Correspondence]

Questions on submission should be sent to Technical program committee,
and other general questions or suggestions including proposals on
panels, special sessions and tutorials should be sent to Conference
secretariat.

Conference secretariat: aspdac2004@aspdac.com
Technical program committee: aspdac2004-tpc@aspdac.com