3D: SPECIAL SESSION - Embedded Software for Multiprocessor Systems-on-Chip


3D-1
Title Model-based Programming Environment of Embedded Software for MPSoC
Author *Soonhoi Ha (Seoul National Univ., Republic of Korea)
Abstract A noble model-based programming environment of embedded software for MPSoC is proposed. By defining a common intermediate code (CIC), it separates modeling of the software and implementation optimized for target architecture. It also allows us to use diverse models for initial specification. Another feature is to provide multi-phase debugging capabilities: at the modeling stage, at the code generation stage, and at the simulation stage. Preliminary experiments with a Divx player confirm the feasibility and validity of the proposed technique.
Slides (pdf file) 3D-1

3D-2
Title RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip
Author *Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada (Nagoya Univ., Japan)
Abstract Multiprocessor designs have become popular in embedded domains for achieving the power and performance requirements. In this paper, we present principles and techniques for design and implementation of RTOS for embedded multiprocessor systems. We also present a system-level design toolkit for rapid design and evaluation of embedded multiprocessor systems.
Slides (pdf file) 3D-2

3D-3
Title Energy-efficient Real-time Task Scheduling in Multiprocessor DVS Systems
Author *Jian-Jia Chen, Chuan-Yue Yang, Tei-Wei Kuo, Chi-Sheng Shih (National Taiwan Univ., Taiwan)
Abstract Dynamic voltage scaling (DVS) circuits have been widely adopted in many computing systems to provide tradeoff between performance and power consumption. The effective use of energy could not only extend operation duration for hand-held devices but also cut down power bills of server systems. Moreover, while many chip makers are releasing multi-core chips and multiprocessor system-on-a-chips (SoCs), multiprocessor platforms for different applications become even more popular. Multiprocessor platforms could improve the system performance and accommodate the growing demand of computing power and the variety of application functionality. This paper summarizes our work on several important issues in energy-efficient scheduling for real-time tasks in multiprocessor DVS systems. Distinct from most previous work based on heuristics, we aim at the provision of approximated solutions with worst-case guarantees. The proposed algorithms are evaluated by a series of experiments to provide insights in system designs.
Slides (pdf file) 3D-3

3D-4
Title Towards Scalable and Secure Execution Platform for Embedded Systems
Author *Junji Sakai, Hiroaki Inoue, Masato Edahiro (NEC, Japan)
Abstract Reliability of embedded systems can be enhanced by multicore and partitioning approach. Physical partitioning based on AMP multicore achieves runtime stability of multiple applications in a system and also prevents the total system shutdown even when a malicious code creeps in. Combined with logical partitioning by processor virtualization and SMP technologies, the multicore architecture could realize more flexible and more scalable platform for the future embedded systems.
Slides (pdf file) 3D-4
Last Updated on: January 30, 2007