Technical Program Committee
Technical Program Chair
- Yusuke Matsunaga (Kyushu University)
Technical Program Vice Co-Chairs
- Kiyoung Choi (Seoul National University)
- Youn-Long Lin (National Tsing Hua University)
Secretary
- Tohru Ishihara (Kyushu University)
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Subcommittees and subcommittee chairs
* : Subcommittee Chairs
1) System Level Design
- Ren-Song Tsay (National Tsing Hua University) *
- Ahmed Jerraya (TIMA)
- Tsuneo Nakata (Fujitsu Lab.)
- Soonhoi Ha (Seoul National Univ.)
- Nikil Dutt (Univ. of California, Irvine)
- Jean Christophe Madre (Synopsys)
2) Embedded and Real-Time Systems
- Hiroyuki Tomiyama (Nagoya University) *
- Pai Chou (Univ. of California, Irvine)
- Eui-Young Chung (Yonsei Univ.)
- Paolo Ienne (EPFL, Switzerland)
- Akihiko Inoue (Matsushita Electric Industrial Co.)
- Tei-Wei Kuo (National Taiwan Univ.)
- Yunheung Paek (Seoul National Univ.)
- Sri Parameswaran (Univ. of New South Wales)
- Maziar Goudarzi (Kyushu Univ.)
3) Behavioral/Logic Synthesis and Optimization
- Shinji Kimura (Waseda University) *
- Diana Marculescu (Carnegie Mellon Univ.)
- Shigeru Yamashita (NAIST)
- Shih-Chieh Chang (National Tsing Hua Univ.)
- Deming Chen (Univ. of Illinois at Urbana-Champaign)
- Ki-seok Chung (Hanyang Univ.)
4) Validation and Verification for Behavioral/Logic Design
- Karem Sakallah (University of Michigan) *
- Shin'ichi Minato (Hokkaido Univ.)
- Jin-Young Choi (Korea Univ.)
- John Moondanos (Intel)
- Jun Sawada (IBM)
- Pete Manolios (Georgia Tech.)
- Thomas Kropf (Bosch)
5) Physical Design (Routing)
- Martin D. F. Wong (University of Illinois, Urbana-Champaign) *
- Atsushi Takahashi (Tokyo Inst. of Tech.)
- Ting-Chi Wang (National Tsing Hua Univ.)
- Charles Chiang (Synopsys, China)
- Hyunchul Shin (Hanyang Univ.)
6) Physical Design (Placement)
- Yao-Wen Chang (National Taiwan University) *
- David Pan (Univ. of Texas at Austin)
- Gi-Joon Nam (IBM)
- Hung-Ming Chen (National Chiao Tung Univ.)
- Jens Vygen (Univ. of Bonn, Germany)
- Shin'ichi Wakabayashi (Hiroshima City Univ.)
- Shigetoshi Nakatake (Univ. of Kitakyushu)
7) Timing, Power, Signal/Power Integrity Analysis and Optimization
- Sachin Sapatnekar (University of Minnesota) *
- Shabbir Batterywala (Synopsys, India)
- Hongliang Chang (Cadence)
- Masanori Hashimoto (Osaka Univ.)
- Jing-Jia Liou (National Tsing Hua Univ.)
- Frank Liu (IBM)
- Youngsoo Shin (KAIST)
8) Interconnect, Device and Circuit Modeling and Simulation
- Hideki Asai (Shizuoka University) *
- Takashi Sato (Tokyo Inst. of Tech.)
- Charlie Chung-Ping Chen (National Taiwan Univ.)
- Yungseon Eo (Hanyang Univ.)
- Sheldon Tan (Univ. of California Riverside)
- Yu Wenjian (Tsinghua Univ.)
- Arun Chandrasekhar (Intel, India)
9) Test and Design for Testability
- Seiji Kajihara (Kyushu Institute of Technology) *
- Prab Varma (Blue Pearl)
- XiaoWei Li (China Academy of Sciences)
- Kuen-Jong Lee (National Cheng Kung Univ.)
- Satoshi Ohtake (NAIST)
10) Analog, RF and Mixed Signal Design and CAD
- Jaijeet Roychowdhury (University of Minnesota)*
- Tomohisa Kimura (Toshiba)
- Inoue Yasuaki (Waseda Univ.)
- SeongHwan Cho (KAIST)
- Zhiping Yu (Tsinghua Univ.)
- Chau-Chin Su (National Chao-Tung Univ.)
- Brian Otis (Univ. of Washington)
11) Leading Edge Design Methodology for SOCs ans SIPs
- Hideharu Amano (Keio University) *
- Yulu Yang (Nankai Univ.)
- Seongsoo Lee (Soongsil Univ.)
- Shorin Kyo (NEC)
- Takeshi Ikenaga (Waseda Univ.)
- Ing-Jer Huang (National Sun-Yat-Sen Univ.)
- Takashi Miyamori (Toshiba)
Last Updated on: June 9, 2006
