学生フォーラム at ASP-DAC 2007

"学生フォーラム at ASP-DAC 2007" は大学院学生が自分の研究について紹介するためのポスタセッションです．学生が大学・企業のエキスパートと議論し，フィードバックを得る機会を提供するための企画です．

  • 日時: 2007年1月25日 (12:20-13:30)
  • 場所: パシフィコ横浜 4階418号室

共同チェア:

  • 関屋 大雄 (千葉大学, 電子情報通信学会 東京支部)
  • 澁谷 利行 (富士通研究所, 電子情報通信学会 VLSI設計技術研究会)

Paper ID Title Author Affiliates
1 Energy vs. Performance Trade-Offs and Interconnect-Aware Design for Coarse Grained Reconfigurable Processors Andy Lambrechts IMEC vzw, Belgium
2 A Novel 130nm CMOS Front-End Receiver for GSM/DCS/UMTS/IEEE802.11a-b-g M.B. Vahidfar Universita degli Studi di Pavia, Italy
3 A Low-Power, High-Performance 32 bit Conditional Sum Adder Shengxiang Fan Peking University, China
4 Post-Routing Redundant Via Insertion and Line End Extension for Yield/Reliability Improvement Kuang-Yao Lee National Tsing Hua University, Taiwan
5 Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction Pei-Ci Wu National Tsing Hua University, Taiwan
6 Exploration of Fixed-Point Design Space for Improving the Performance of Digital Systems S. Wijaya The University of Western Australia, Australia
7 Fat H-Tree: A Cost-Efficient Tree-Based On-Chip Network Hiroki Matsutani Keio University, Japan
8 Design Methodology and CAD Tools for Nanometer FPGAs: Optimization for Leakage Power and Crosstalk Hassan Hassan University of Waterloo, Canada
9 Tailoring Circuit-Switched Network-on-Chip to Application-Specific SOC KUEI-CHUNG CHANG National Chung Cheng University, Taiwan
10 Low-Ripple-Voltage and High-Speed-Response Control System with MEMS Technology for Load Regulation of Switching Regulators Masashi Kono Gunma University, Japan
11 Wire Length Estimation for Block Placement Tan Yan The University of Kitakyushu, Japan
12 An Operation Chaining Method with Global Analysis and Complex Specialized Functional Units in Behavioral Synthesis Tsuyoshi Sadakata Kyushu University, Japan
13 New Analytical Modeling Approach for Class D Audio Amplifiers Yashar Hesamiafshar University of Tehran, Iran
14 Task Partitioning Oriented Architecture Exploration Method for Dynamic Reconfigurable Architectures Ittetsu TANIGUCHI Osaka University, Japan
15 Nonuniform Sampling ADC Using Time-to-Digital Converter and its Signal Processing Kazuya Shimizu Gunma University, Japan
16 An Effective Pseudo-transient Algorithm and its Implementations for Finding DC Operating Points of Nonlinear Circuits Hong Yu Waseda University, Japan
17 A Data Alignment Method for Block Floating Point Systems Takashi Hamabe Osaka University, Japan
18 3D-Floorplanning by Practical MOVE Operation with smooth Solution Space Hidenori OHTA Tokyo University of Agriculture and Technology, Japan
19 An Effort toward Design Automation of General Synchronous Circuit Yousuke HARADA Tokyo Institute of Technology, Japan
20 Nonlinear Circuit EDA: Sensitivity Calculation and Per-Element Distortion Decompostion Guoji Zhu University of Waterloo, Canada
21 An SoC Architecture of H.264/AVC Decoder with Block Pipelining Structure Sumek WISAYATAKSIN Tokyo Institute of Technology, Japan
22 A new design framework for multiprocessor system on chip Arif Ullah Khan Tokyo Institute of Technology, Japan
Last Updated on: December, 28, 2006