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The 12th Asia and South Pacific Design Automation Conference

Session 2K Keynote Address II
Time: 9:00 - 10:00 Thursday, January 25, 2007
Location: Small Auditorium, 5F
Chair: Hidetoshi Onodera (Kyoto Univ., Japan)

2K-1 (Time: 9:00 - 10:00)
Title(Keynote Address) Meeting with the Forthcoming IC Design - The Era of Power, Variability and NRE Explosion and a Bit of the Future -
AuthorTakayasu Sakurai (The Univ. of Tokyo, Japan)
Keyword
AbstractIn the foreseeable future, VLSI design will meet a couple of explosions: power, variability and NRE (non-recurring engineering cost). Some of the solutions for power-aware designs are covered in this talk with relation to variability. A remedy for the NRE explosion is to reduce the number of developments and manufacture and sell tens of millions of chips under a fixed design. System-in-a-Package approach may embody such possibility. Several new technologies are described to enable 3-dimensional stacking of chips to build high-performance yet low-power electronics systems. On the other extreme of the silicon VLSI's which stay as small as a centimeter square, a new domain of electronics called large-area integrated circuit as large as meters is waiting, which may open up a new continent of applications in the era of ubiquitous electronics. One of the implementations of the large-area electronics is based on organic transistors. The talk will provide perspectives of the organic circuit design taking E-skin, sheet-type scanner and Braille display as examples.