| Title | Passive Interconnect Macromodeling Via Balanced Truncation of Linear Systems in Descriptor Form |
| Author | Boyuan Yan, *Sheldon X.-D. Tan, Pu Liu (University of California, Riverside, United States), Bruce McGaughy (Cadence Design Systems Inc., United States) |
| Page | pp. 355 - 360 |
| Keyword | model order reduction, descriptor form, TBR, passivity |
| Abstract | In this paper, we present a novel passive model order reduction (MOR) method via projection-based truncated balanced realization method, PriTBR, for large RLC interconnect circuits. Different from existing passive truncated balanced realization (TBR) methods where numerically expensive Lur'e or algebraic Riccati (ARE's) equations are solved, the new method performs balanced truncation on linear system in descriptor form by solving generalized Lyapunov equations. Passivity preservation is achieved by congruence transformation instead of simple truncations. For the first time, passive model order reduction is achieved by combining Lyapunov equation based TBR method with congruence transformation. Compared with existing passive TBR, the new technique has the same accuracy and is numerically reliable, less expensive. In addition to passivity-preserving, it can be easily extended to preserve structure information inherent to RLC circuits, like block structure, reciprocity and sparsity. PriTBR can be applied as a second MOR stage combined with Krylov-subspace methods to generate a nearly optimal reduced model from a large scale interconnect circuit while passivity, structure, and reciprocity are preserved at the same time. Experimental results demonstrate the effectiveness of the proposed method and show PriTBR and its structure-preserving version, SP-PriTBR, are superior to existing passive TBR and Krylov-subspace based moment-matching methods. |
| Title | Automated Extraction of Accurate Delay/Timing Macromodels of Digital Gates and Latches using Trajectory Piecewise Methods |
| Author | Sandeep Dabas, Ning Dong, *Jaijeet Roychowdhury (University of Minnesota, Twin Cities, United States) |
| Page | pp. 361 - 366 |
| Keyword | Model-order-reduction, Simulation |
| Abstract | We present a fundamentally new approach,ADME, for extracting highly accurate delay models of a wide variety of digital gates. The technique is based on trajectory-piecewise automated nonlinear macromodelling methods adapted from the mixed-signal/RF domain. Advantages over prior current-source models include rapid automated extraction from SPICE-level netlists, transparent retargettability to different design styles and technologies, and the ability to correctly and holistically account for complex input waveform shapes, nonlinear and linear loading, multiple input switching, effects of internal state, multiple I/Os, supply droop and substrate interference. We validate ADME on a variety of digital gates, including multi-input NAND, NOR, XOR gates, a full adder, a multilevel cascade of gates and a sequential latch. Our results confirm excellent model accuracy at the detailed waveform level and testify to the promise of ADME for sustainable gate delay modelling at nanoscale technologies. |
| Title | Practical Implementation of Stochastic Parameterized Model Order Reduction via Hermite Polynomial Chaos |
| Author | Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong (Tsinghua University, China), Sheldon X.D-Tan (University of California, Riverside, United States), *Le Kang (Tsinghua University, China) |
| Page | pp. 367 - 372 |
| Keyword | stochastic interconnect analysis , Model order reduction |
| Abstract | This paper describes the stochastic model order reduction algorithm via stochastic Hermite Polynomials from the practical implementation perspective. Comparing with existing work on stochastic interconnect analysis and parameterized model order reduction, we generalized the input variation representation using polynomial chaos (PC) to allow for accurate modeling of non-Gaussian input variations. We also explore the implicit system representation using sub-matrices and improved the efficiency for solving the linear equations utilizing block matrix structure of the augmented system. Experiments show that our algorithm matches with Monte Carlo methods very well while keeping the algorithm effective. And the PC representation of non-gaussian variables gains more accuracy than Taylor representation used in previous work. |
| Title | Reduced-Order Wide-Band Interconnect Model Realization using Filter-Based Spline Interpolation |
| Author | *Arthur Nieuwoudt, Mehboob Alam, Yehia Massoud (Rice University, United States) |
| Page | pp. 373 - 378 |
| Keyword | model order reduction, wide-band interconnect modeling |
| Abstract | In the paper, we develop a systematic methodology for modeling sampled interconnect frequency response data based on spline interpolation. Through piecewise polynomial interpolation, we are able to avoid the numerical problems associated with global polynomial fitting and generate higher order systems to model simulated or measured wideband frequency response data. We reduce the complexity of the generated systems using a data point pruning algorithm and by applying model order reduction based on balanced truncation. The methodology provides substantially greater accuracy than global polynomial approximation while only having O(n) growth in model complexity. |
| Title | Frequency Selective Model Order Reduction via Spectral Zero Projection |
| Author | Mehboob Alam, *Arthur Nieuwoudt, Yehia Massoud (Rice University, United States) |
| Page | pp. 379 - 383 |
| Keyword | Interconnect, Model Order Reduction, Passivity |
| Abstract | As process technology continues to scale into the nanoscale regime, interconnect plays an ever increasing role in determining VLSI system performance. As the complexity of these systems increases, reduced order modeling becomes critical. In this paper, we develop a new method for the model order reduction of interconnect using frequency restrictive selection of interpolation points based on the spectral-zeros of the RLC interconnect model’s transfer function. The methodology uses the imaginary part of spectral zeros for frequency selective projection and provides stable as well as passive reduced order models for interconnect in VLSI systems. For large order interconnect models with realistic RLC parameters, the results indicate that our method provides more accurate approximations than techniques based on balanced truncation and moment matching with excellent agreement with the original system’s transfer function. |