| Title | Optimization of Arithmetic Datapaths with Finite Word-Length Operands |
| Author | *Sivaram Gopalakrishnan, Priyank Kalla (Univ. of Utah, United States), Florian Enescu (Georgia State Univ., United States) |
| Page | pp. 511 - 516 |
| Detailed information (abstract, keywords, etc) | |
| Title | Exploiting Power-Area Tradeoffs in Behavioural Synthesis through Clock and Operations Throughput Selection |
| Author | *Marco A. Ochoa-Montiel, Bashir M. Al-Hashimi (Univ. of Southampton, Great Britain), Peter Kollig (Philips Semiconductors, Great Britain) |
| Page | pp. 517 - 522 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications |
| Author | *Yazhuo Dong, Yong Dou (National Univ. of Defense Technology, China) |
| Page | pp. 523 - 528 |
| Detailed information (abstract, keywords, etc) | |
| Title | High-Level Power Estimation and Low-Power Design Space Exploration for FPGAs |
| Author | *Deming Chen (Univ. of Illinois, Urbana-Champaign, United States), Jason Cong, Yiping Fan, Zhiru Zhang (Univ. of California, Los Angeles, United States) |
| Page | pp. 529 - 534 |
| Detailed information (abstract, keywords, etc) | |
| Title | Numerical Function Generators Using Edge-Valued Binary Decision Diagrams |
| Author | *Shinobu Nagayama (Hiroshima City Univ., Japan), Tsutomu Sasao (Kyushu Inst. of Tech., Japan), Jon Butler (Naval Postgraduate School, United States) |
| Page | pp. 535 - 540 |
| Detailed information (abstract, keywords, etc) | |