(Back to Session Schedule)

The 12th Asia and South Pacific Design Automation Conference

Session 8D Designers' Forum: High-speed Chip to Chip Signaling Solutions
Time: 13:30 - 15:35 Friday, January 26, 2007
Location: Small Auditorium, 5F
Chairs: Haruyuki Tago (Toshiba Co., Japan), Kazutoshi Kobayashi (Kyoto Univ., Japan)

8D-1 (Time: 13:30 - 14:00)
Title(Invited Paper) Preferable Improvements and Changes to FB-DiMM High-Speed Channel for 9.6Gbps Operation
Author*Atsushi Hiraishi, Toshio Sugano (Elpida Memory, Japan), Hideki Kusamitsu (Yamaichi Electronics, Japan)
Pagepp. 841 - 845
Detailed information (abstract, keywords, etc)

8D-2 (Time: 14:00 - 14:30)
Title(Invited Paper) Xbox360TM Front Side Bus - A 21.6 Gb/s End to End Interface Design
Author*David Siljenberg, Steve Baumgartner, Tim Buchholtz, Mark Maxson, Trevor Timpane (IBM, United States), Jeff Johnson (Cadence Design Systems, United States)
Pagepp. 846 - 853
Detailed information (abstract, keywords, etc)

8D-3 (Time: 14:30 - 15:00)
Title(Invited Paper) Design Consideration of 6.25 Gbps Signaling for High-Performance Server
Author*Jian Hong Jiang, Weixin Gai, Akira Hattori, Yasuo Hidaka, Takeshi Horie, Yoichi Koyanagi, Hideki Osone (Fujitsu Laboratories of America, United States)
Pagepp. 854 - 857
Detailed information (abstract, keywords, etc)

8D-4 (Time: 15:00 - 15:30)
Title(Invited Paper) System Co-Design and Co-Analysis Approach to Implementing the XDRTM Memory System of the Cell Broadband EngineTM Processor Realizing 3.2 Gbps Data Rate per Memory Lane in Low Cost, High Volume Production
Author*Wai-Yeung Yip, Scott Best, Wendemagegnehu Beyene, Ralf Schmitt (Rambus, United States)
Pagepp. 858 - 865
Detailed information (abstract, keywords, etc)