13th Asia and South Pacific Design Automation Conference
ASP-DAC 2008
Date : January 21 - 24, 2008
Place:
COEX
, Seoul, Korea
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Designers' Forum
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Univ. LSI Design Contest
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Keynote Addresses
Keynote 1: "A Brand New Wireless Day"
Jan M. Rabaey (
Univ. of California, Berkeley, USA
)
Keynote 2: " The Evolution of SoC Platform According to the New Mobile Paradigm"
Ki-Soo Hwang (
Core Logic, Korea
)
Keynote 3: " The Future of Semiconductor Industry - A Foundry's Perspective"
F. C. Tseng (
TSMC, Taiwan
)
Designers' Forum
4D: New Emerging Application Areas for Future SoC
5D: Are System Level EDA Tools/Methodologies Coming?
8D: Low Power Chips
9D: Best Ways to Use Billions of Devices on a Chip
Special Session
2D: Tackling Manufacturability/Variability for 45nm and Below
3D: The Tears and Joy of Sowing and Reaping Complex SoC's
6D: How to Design Cool Chips for Hot Products
7D: Concurrent SoC and SiP Designs
University LSI Design Contest
1D: University Design Contest
Regular Technical Sessions
1A: New Challenges in High Level Synthesis
1B: Power and Thermal Modeling and Optimization
1C: Emerging Technologies
2A: Advanced Topic in Logic Synthesis
2B: Interconnect Modeling and Simulation Techniques
2C: Floorplanning
3A: Routing
3B: Interconnect, NoCs, and MPSoCs
4A: Variability Issues in Timing
4B: Memory and Processor Optimization
4C: New Techniques for Physical Design Optimization
5A: Techniques for Formal and Simulation-Based Verification
5B: Power and Performance Optimization for Embedded Systems
5C: Thermal Analysis and DFM
6A: Trends in Timing
6B: Statistical Modeling and Yield Prediction
7A: Reliable/Testable Design Techniques
7B: Communication and Interfaces
7C: Power: Delivery and Reduction
8A: Test Generation and Test Power
8B: Design Space Exploration
8C: Reliability and Power Management
9A: Analog/RF/Mixed Signal CAD
9B: Architecture Exploration
Last Updated on: January 31, 2008