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Session 9B: Architecture Exploration
9B-1 (Time: 15:50 - 16:15)
| Title |
SPKM : A Novel Graph Drawing Based Algorithm for Application Mapping onto Coarse-Grained Reconfigurable Architectures |
| Author |
*Jonghee Yoon (Seoul Nat’l Univ., Korea), Aviral Shrivastava (Arizona State Univ., USA), Sanghyun Park, Minwook Ahn (Seoul Nat’l Univ., Korea), Reiley Jeyapaul (Arizona State Univ., USA), Yunheung Paek (Seoul Nat’l Univ., Korea) |
| Abstract |
Recently coarse-grained reconfigurable architectures (CGRAs) have drawn increasing attention due to their efficiency and flexibility. While many CGRAs have demonstrated impressive performance improvements, the effectiveness of CGRA platforms ultimately hinges on the compiler. Existing CGRA compilers do not model the details of the CGRA architecture, due to which they are, i) unable to map applications, even though a mapping exists, and ii) use too many PEs to map an application. In this paper, we model several CGRA details in our compiler and develop a graph mapping based approach (SPKM) for mapping applications onto CGRAs. On randomly generated graphs our technique can map on average 4.5X more applications than the previous approaches, while using fewer CGRA rows 62% times, without any penalty in mapping time. We observe similar results on a suite of benchmarks collected from Livermore Loops, Multimedia and DSPStone benchmarks. |
| Slides |
9B-2 (Time: 16:15 - 16:40)
| Title |
Block Remap with Turnoff: A Variation-Tolerant Cache Design Technique |
| Author |
*Mohammed Abid Hussain (Int'l Inst. of Information Tech., Hyderabad, India), Madhu Mutyam (Indian Inst. of Tech. Madras, India) |
| Abstract |
With reducing feature size, the effects of process variations are becoming more and more predominant. Memory components such as on-chip caches are more susceptible to such variations because of high density and small sized transistors present in them. In this paper, we propose a variation-tolerant design technique for process variation affected on-chip data caches. In our technique we selectively turnoff few blocks after rearranging them in such a way that all sets get almost equal number of process variation effected blocks. We show that our technique significantly reduces the performance loss and leakage energy consumption due to process variations. |
| Slides |
9B-3 (Time: 16:40 - 17:05)
| Title |
ORB: An On-Chip Optical Ring Bus Communication Architecture for Multi-Processor Systems-on-Chip |
| Author |
*Sudeep Pasricha, Nikil Dutt (Univ. of California, Irvine, USA) |
| Abstract |
As application complexity continues to increase, multi-processor systems-on-chip (MPSoC) with tens to hundreds of processing cores are becoming the norm. While computational cores have become faster with each successive technology generation, communication between them has become a bottleneck that limits overall chip performance. On-chip optical interconnects can overcome this bottleneck by replacing electrical wires with optical waveguides. In this paper we propose an optical ring bus (ORB) based on-chip communication architecture for next generation MPSoCs. ORB uses an optical ring waveguide to replace global pipelined electrical interconnects while preserving the interface with today’s bus protocol standards such as AMBA AXI. We present experiments to show how ORB has the potential to provide superior performance (more than 2×) and significantly lower power consumption (a reduction of more than 10×) compared to traditionally used pipelined, all-electrical bus-based communication architectures, for 65-22 nm technology nodes. |
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9B-4 (Time: 17:05 - 17:30)
| Title |
Webpage-Based Benchmarks for Mobile Device Design |
| Author |
*Marc Somers, JoAnn M. Paul (Virginia Tech., USA) |
| Abstract |
By investigating the content, structure and usage of webpages, we observe that webpages represent a fundamentally different standard for performance evaluation of computer designs. We found that specialized architectures, customized to webpage content, can improve performance up to 70% over a homogeneous multiprocessor with 25% additional improvement when individual user preferences are also considered. Thus, a new form of benchmark suite is required, based upon the rapidly evolving and divergent content of information exchanged via webpages on mobile devices. |
| Slides |
Last Updated on: January 31, 2008
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