(Back to Session Schedule)

The 13th Asia and South Pacific Design Automation Conference

Session 8A  Test Generation and Test Power
Time: 13:30 - 15:35 Thursday, January 24, 2008
Location: Room 310A
Chairs: Hideo Fujiwara (NAIST, Japan), Yu Hu (Chinese Academy of Science, China)

8A-1 (Time: 13:30 - 13:55)
TitleCircuit Lines for Guiding the Generation of Random Test Sequences for Synchronous Sequential Circuits
AuthorIrith Pomeranz (Purdue Univ., United States), *Sudhakar M. Reddy (Univ. of Iowa, United States)
Pagepp. 641 - 646
Detailed information (abstract, keywords, etc)

8A-2 (Time: 13:55 - 14:20)
TitleA New Low Energy BIST Using A Statistical Code
Author*Sunghoon Chun, Taejin Kim, Sungho Kang (Yonsei Univ., Republic of Korea)
Pagepp. 647 - 652
Detailed information (abstract, keywords, etc)

8A-3 (Time: 14:20 - 14:33)
TitleOn Reducing Both Shift and Capture Power for Scan-Based Testing
AuthorJia Li (Chinese Academy of Sciences, China), *Qiang Xu (The Chinese Univ. of Hong Kong, Hong Kong), Yu Hu, Xiaowei Li (Chinese Academy of Sciences, China)
Pagepp. 653 - 658
Detailed information (abstract, keywords, etc)

8A-4 (Time: 14:33 - 14:46)
TitleRobust Test Generation for Power Supply Noise Induced Path Delay Faults
Author*Xiang Fu, Huawei Li, Yu Hu, Xiaowei Li (Chinese Academy of Sciences, China)
Pagepp. 659 - 662
Detailed information (abstract, keywords, etc)

8A-5 (Time: 14:46 - 14:59)
TitleTest Vector Chains for Increased Targeted and Untargeted Fault Coverage
AuthorIrith Pomeranz (Purdue Univ., United States), *Sudhakar M. Reddy (Univ. of Iowa, United States)
Pagepp. 663 - 666
Detailed information (abstract, keywords, etc)

8A-6 (Time: 14:59 - 15:12)
TitleParallel Fault Backtracing for Calculation of Fault Coverage
Author*Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman (Tallinn Univ. of Tech., Estonia)
Pagepp. 667 - 672
Detailed information (abstract, keywords, etc)