Title | SAT-Controlled Redundancy Addition and Removal --- A Novel Circuit Restructuring Technique |
Author | Chi-An Wu, Ting-Hao Lin, Shao-Lun Huang, *Chung-Yang (Ric) Huang (National Taiwan Univ., Taiwan) |
Page | pp. 191 - 196 |
Detailed information (abstract, keywords, etc) |
Title | On Improved Scheme for Digital Circuit Rewiring and Application on Further Improving FPGA Technology Mapping |
Author | Fu Shing Chim, *Tak Kei Lam, Yu Liang Wu (Chinese Univ. of Hong Kong, Hong Kong) |
Page | pp. 197 - 202 |
Detailed information (abstract, keywords, etc) | |
Slides |
Title | Hybrid LZA: A Near Optimal Implementation of the Leading Zero Anticipator |
Author | Amit Verma (National Inst. of Tech., Rourkela, India), *Ajay K. Verma, Philip Brisk, Paolo Ienne (EPFL, Switzerland) |
Page | pp. 203 - 209 |
Detailed information (abstract, keywords, etc) |
Title | An Optimized Design for Serial-Parallel Finite Field Multiplication over GF(2m) Based on All-One Polynomials |
Author | Pramod Kumar Meher (Nanyang Technological Univ., Singapore), *Yajun Ha (National Univ. of Singapore, Singapore), Chiou-Yng Lee (Lunghwa Univ. of Science and Tech., Taiwan) |
Page | pp. 210 - 215 |
Detailed information (abstract, keywords, etc) |