Title | (Keynote Address) Automated Synthesis and Verification of Embedded Systems: Wishful Thinking or Reality? |
Author | Wolfgang Rosenstiel (Wilhelm-Schickard-Institute for Informatics, University of Tuebingen, Germany) |
Abstract | More complex embedded hardware/software systems have to be developed with shorter design time and reduced cost. One solution for this problem is increasing design automation starting from higher levels of abstraction. Automatic synthesis and verification has been around in research for a quite a while. This talk will show examples for state-of-the art tools for system-level synthesis and verification of embedded systems and demonstrate their possibilities and limitations by some automotive applications. |