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The 14th Asia and South Pacific Design Automation Conference

Session 3A  System-Level Design of 3D Chips and Configurable Systems
Time: 15:55 - 18:00 Tuesday, January 20, 2009
Location: Room 411+412
Chairs: Eui-Young Chung (Yonsei Univ., Republic of Korea), Steve Haga (National Sun Yat-Sen Univ.)

3A-1 (Time: 15:55 - 16:20)
TitleSystem-Level Cost Analysis and Design Exploration for Three-Dimensional Integrated Circuits (3D ICs)
Author*Xiangyu Dong, Yuan Xie (Pennsylvania State Univ., United States)
Pagepp. 234 - 241
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3A-2 (Time: 16:20 - 16:45)
TitleSynthesis of Networks on Chips for 3D Systems on Chips
Author*Srinivasan Murali, Ciprian Seiculescu (EPFL, Switzerland), Luca Benini (Univ. of Bologna, Italy), Giovanni De Micheli (EPFL, Switzerland)
Pagepp. 242 - 247
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3A-3 (Time: 16:45 - 17:10)
TitleAn Application-centered Design Flow for Self Reconfigurable Systems Implementation
Author*Fabio Cancare, Marco Domenico Santambrogio, Donatella Sciuto (Politecnico di Milano, Italy)
Pagepp. 248 - 253
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3A-4 (Time: 17:10 - 17:35)
TitleSystem-Level Process Variability Compensation on Memory Organizations. On the Scalability of Multi-Mode Memories
Author*Concepción Sanz, Manuel Prieto, José Ignacio Gómez (Univ. Complutense de Madrid, Spain), Antonis Papanikolaou, Francky Catthoor (Inter-Univ. Microelectronics Center, Belgium)
Pagepp. 254 - 259
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