| Title | Computation and Data Transfer Co-Scheduling for Interconnection Bus Minimization |
| Author | Cathy Qun Xu (Univ. of Texas, Dallas, United States), *Chun Jason Xue, Bessie C Hu (City Univ. of Hong Kong, Hong Kong), Edwin H.M. Sha (Univ. of Texas, Dallas, United States) |
| Page | pp. 311 - 316 |
| Detailed information (abstract, keywords, etc) | |
| Title | Prototyping Pipelined Applications on a Heterogeneous FPGA Multiprocessor Virtual Platform |
| Author | *Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani (Politecnico di Milano, Italy), Matteo Monchiero (HP Labs, United States), Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto (Politecnico di Milano, Italy) |
| Page | pp. 317 - 322 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Variability-Aware Robust Design Space Exploration of Chip Multiprocessor Architectures |
| Author | *Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria (Politecnico di Milano, DEI, Italy) |
| Page | pp. 323 - 328 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Partial Conflict-Relieving Programmable Address Shuffler for Parallel Memories in Multi-Core Processor |
| Author | *Young-Su Kwon, Bon-Tae Koo, Nak-Woong Eum (ETRI, Republic of Korea) |
| Page | pp. 329 - 334 |
| Detailed information (abstract, keywords, etc) | |
| Title | HitME: Low Power Hit MEmory Buffer for Embedded Systems |
| Author | Andhi Janapsatya, *Sri Parameswaran, Aleksandar Ignjatovic (Univ. of New South Wales, Australia) |
| Page | pp. 335 - 340 |
| Detailed information (abstract, keywords, etc) | |