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The 14th Asia and South Pacific Design Automation Conference

Session 5D  Designers' Forum: Consumer SoC
Time: 13:30 - 15:35 Wednesday, January 21, 2009
Location: Room 416+417
Chair: Yoshio Masubuchi (Toshiba Corp., Japan)

5D-1 (Time: 13:30 - 14:10)
Title(Invited Paper) Development of Full-HD Multi-standard Video CODEC IP Based on Heterogeneous Multiprocessor Architecture
Author*Hiroaki Nakata, Koji Hosogi, Masakazu Ehama, Takafumi Yuasa, Toru Fujihira (Hitachi, Ltd., Japan), Kenichi Iwata, Motoki Kimura, Fumitaka Izuhara, Seiji Mochizuki, Masaki Nobori (Renesas Technology Corp., Japan)
Pagepp. 528 - 534
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5D-2 (Time: 14:10 - 14:50)
Title(Invited Paper) A 65nm Dual-mode Baseband and Multimedia Application Processor SoC with Advanced Power and Memory Management
Author*Tatsuya Kamei, Tetsuhiro Yamada, Takao Koike, Masayuki Ito, Takahiro Irita, Kenichi Nitta, Toshihiro Hattori, Shinichi Yoshioka (Renesas Technology Corp., Japan)
Pagepp. 535 - 539
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Slides

5D-3 (Time: 14:50 - 15:30)
Title(Invited Paper) UniPhier: Series Development and SoC Management
Author*Yoshito Nishimichi, Nobuo Higaki, Masataka Osaka, Seiji Horii, Hisato Yoshida (Panasonic Corp., Japan)
Pagepp. 540 - 545
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