| Title | (Invited Paper) The Shrink Wrapped Myth: Cross Platform Software |
| Author | *Mike Olivarez (Freescale Semiconductor, Inc., U.S.A.) |
| Keyword | Software Reuse, Architecture, Compiler, RTOS, Open OS |
| Abstract | "Shrink wrapped" software has been a goal from mainframes to embedded systems. Many issues keep this from being a reality based on architecture and performance requirements. This presentation focuses on the Architecture, Compiler, OS and Performance and how they effect the overall reuse for embedded systems. Freescale's MXC cellular architecture is used as an example on these points and getting a system to market. |
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| Title | (Invited Paper) Using Software to Achieve Low Power Solutions |
| Author | *Albert Shiue (Alvaview Technologies, Taiwan) |
| Keyword | low power design, compiler optimization, video codec design, multimedia software for low power, MPEG, H.264, DSP,the lightest player, internet radio and internet TV |
| Abstract | We would present how software achieves low power solution. This includes
we use loop transformation techniques and compiler optimization for video
codec design.
In the architectural feature of DSPs that makes code generation
difficult, namely the use of multiple data memory banks. This feature increases
memory bandwidth by permitting multiple data memory accesses to occur in
parallel when the referenced variables belong to different data memory banks
and the registers involved conform to a strict set of conditions. We present algorithms
that attempt to maximize the performance, minimize the energy, and therefore,
maximize the benefit of this architectural feature. Experimental results demonstrate
that our algorithms generate high performance, low energy code for the M56000 DSP.
We also demo Alvaview products: iiplayer (the lightest player for embedded
systems) and internet radio & TV. All the above consumes the least CPU
utilization and the less memory usage for embedded systems such as MID,
netbook, mobile phones, etc. This demonstrates our topic at using software
to achieve low power solutions. |
| Title | (Invited Paper) MPSoC Programming using the MAPS Compiler |
| Author | Rainer Leupers, *Jeronimo Castrillon (RWTH Aachen University, Germany) |
| Page | pp. 897 - 902 |
| Keyword | MPSoC Programming, Compiler, Multi-application, KPN, Scheduling and Mapping |
| Abstract | The problem of efficiently programming complex
embedded heterogeneous Multi-Processor Systems-On-
Chip (MPSoCs) continues to be one of the biggest hurdles in
the IT community. Extracting parallelism from sequential applications,
dealing with different programming models, and
handling real time constraints in the presence of multiple
concurrent applications are some of the challenges that make
MPSoC programming so difficult.
In this paper we describe the MAPS tool suite, which tries to
tackle these aspects ofMPSoC programming in an integrated
development environment built upon the Eclipse framework.
We give an overview of the MAPS framework, highlighting
its differences to the previous work in [7], and report on experiences
using the tool. |
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| Title | (Invited Paper) System-level Development of Embedded Software |
| Author | *Gunar Schirner (Northeastern University, U.S.A.), Andreas Gerstlauer (University of Texas, Austin, U.S.A.), Rainer Domer (University of California, Irvine, U.S.A.) |
| Page | pp. 903 - 909 |
| Keyword | System Level Design, Embedded Software |
| Abstract | Embedded software plays an increasingly important role in implementing modern embedded systems. Development of embedded software, and of Hardware-dependent Software in particular,
is challenging due to the tight integration with the underlying hardware architecture.
In this paper, we describe our system-level design approach that allows designers to develop software in form of a platform-agnostic specification. Our design environment enables exploration of different architectural alternatives and subsequently generates the software implementation. It generates the application code, communication drivers, and an adaptation to a
chosen RTOS. It completes the process by producing the final target binary for each processor. Our experimental results demonstrate the automatic generation of the binaries for five control and media oriented applications. |
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