Student Forum at ASP-DAC 2010  

The Student Forum at ASP-DAC 2010 is a poster session for graduate students to present their research works. This is a great opportunity for students to get feedback and have discussions with people from academia and industry.

Posters:


Poster ID Title Author
1 A study on timing verification and power network design based on statistical modeling of power supply noise Takashi Enami,
Osaka University,
Japan
2 Design Exploration for Variability-Tolerant 3D Chip-Multiprocessors on Heat, Power and Throughput Wan-Yu Lee,
National Chiao Tung University,
Taiwan
3 Linear Macromodeling Process Advancement via Digital Signal Processing Techniques Chi-Un Lei,
The University of Hong Kong,
Hong Kong
4 Efficient VLSI Architectures for Ultra High Definition H.264/AVC Deblocking Filter Jinjia Zhou,
Waseda University,
Japan
5 Scan-Based Attack against Cryptography LSIs Ryuta Nara,
Waseda University,
Japan
6 Cycle Count Accurate Memory Modeling in System Level Design Mao-Lin Li,
National Tsing Hua University,
Taiwan
7 How to Consider Shorts and Guarantee Yield Rate Improvement for Redundant Wire Insertion Fong-Yuan Chang,
National Tsing Hua University,
Taiwan
8 F-Scan: A DFT Method for Functional Scan at RTL Marie Engelene J. Obien,
Nara Institute of Science and Technology,
Japan
9 Design Methodologies for Double Patterning Lithography Jae-Seok Yang,
The University of Texas at Austin,
USA
10 Fast Detection of Node Mergers Using Logic Implications Yung-Chih Chen,
National Tsing Hua University,
Taiwan
11 Noise Analysis Method in Mixed-Signal Soc Floorplan Design for a Fast Success Mikiko Sode Tanaka,
 Waseda University,
 Japan
12 Symmetry-Aware TCG-Based Placement Design under Complex Multi-Group Constraints for Analog Circuit Layouts Rui He,
Memorial University of Newfoundland,
Canada
13 Floorplan-driven High-level Synthesis for GDR Architectures Akira Ohchi,
Waseda University,
 Japan
14 Virtualizable and Preemptible Hardware/Software Run-Time Environment for Dynamically Partially Reconfigurable Systems Chun-Hsian Huang,
 National Chung Cheng University,
Taiwan
15 A BER Performance-Aware Early Termination Scheme for Layered LDPC Decoder Architecture Xiongxin Zhao,
 Waseda University,
 Japan
16 Accelerating LUT-based FPGA Prototyping by Automatic Pipeline Generation Weijie Xing,
 Waseda University,
 Japan
17 PCB Routing Method Using 45 Degree Lines within Extracted Critical Areas Kyosuke Shinoda,
 Tokyo Institute of Technology,
 Japan
18 Fast Estimation of Peak Power by Appropriate Input Vector Selection Nobuyoshi Takahashi,
 Tokyo Institute of Technology,
 Japan
19 Source-Level Timing Annotation for Fast and Accurate TLM Computation Model Generation Chen-Kang Lo,
 National Tsing Hua University,
 Taiwan
20 Aging and Process Variation Aware Reliability Analysis and Optimization for Nanoscale System-On-Chip Design Balaji Vaidyanathan,
 Pennsylvania State University,
 USA
21 An Effective Synchronization Approach for Fast and Accurate Multi-core Instruction-set Simulation Meng-Huan Wu,
 National Tsing Hua University,
 Taiwan
22 CHECKPOINT AND ROLLBACK RECOVERY IN NETWORK-ON-CHIP BASED SYSTEMS Claudia Rusu,
 TIMA Laboratory (CNRS-UJF-INPG),
 France
23 COMPOSE: Contract-based Many-core Processor Quality-of-Service Jonas Diemer,
 Technische Universitat Braunschweig,
 Germany
24 Resource Management in Networks-on-chip Using Online Learning Chen-Ling Chou,
 Carnegie Mellon University,
 USA
25 PM-COSYN: PE and Memory Co-Synthesis for MPSoCs Yi-Jung Chen,
 National Taiwan University,
 Taiwan
26 Fast Design Space Eexploration for Multi Parametric Optimized VLSI and SoC Designs Anirban Sengupta,
 Ryerson University,
 Canada

Supported by:

ASP-DAC 2010

Contact Information:

Should you have any questions, please send e-mail to Ting-Chi Wang: tcwang@cs.nthu.edu.tw

Committee Members:

Chair:

Ting-Chi Wang (National Tsing Hua University, Taiwan)

Poster Selection Committee Members:

Eui-Young Chung (Yonsei University, Korea)

Sung Woo Chung (Korea University, Korea)

Koji Hashimoto (Fukuoka University, Japan)

Yongsoo Joo (Pennsylvania State University, USA)

Hyung-Ock Kim (Samsung Electronics, Korea)

Hyung Gyu Lee (Samsung Electronics, Korea)

Yih-Lang Li (National Chiao Tung University, Taiwan)

Chien-Nan Jimmy Liu (National Central University, Taiwan)

Yung-Hsiang Lu (Perdue University, USA)

Kohei Miyase (Kyushu Institute of Technology, Japan)

Shinobu Nagayama (Hiroshima City University, Japan)

Hiroshi Saito (University of Aizu, Japan)

Dongwan Shin (Qualcomm, Korea)

Chun-Yao Wang (National Tsing Hua University, Taiwan)

Takayuki Watanabe (University of Shizuoka, Japan)

David Wu (Chinese University of Hong Kong, Hong Kong)

Chia-Lin Yang (National Taiwan University, Taiwan)

 

Advisory Committee:

Naehyuck Chang (Seoul National University, Korea)

Yasuhiro Takashima (University of Kitakyushu, Japan)

Call for Posters

Student Forum at ASP-DAC 2010 Call for Posters