(Back to Session Schedule)

The 16th Asia and South Pacific Design Automation Conference

Session 1C  Advances in Model Order Reduction and Extraction Techniques
Time: 10:20 - 12:20 Wednesday, January 26, 2011
Location: Room 414+415
Chairs: Sheldon X.-D. Tan (Univ. of California, Riverside, U.S.A.), Genichi Tanaka (Renesas, Japan)

1C-1 (Time: 10:20 - 10:50)
TitleA Moment-Matching Scheme for the Passivity-Preserving Model Order Reduction of Indefinite Descriptor Systems with Possible Polynomial Parts
Author*Zheng Zhang (Massachusetts Inst. of Tech., U.S.A.), Qing Wang, Ngai Wong (Univ. of Hong Kong, Hong Kong), Luca Daniel (Massachusetts Inst. of Tech., U.S.A.)
Pagepp. 49 - 54
Detailed information (abstract, keywords, etc)
Slides

1C-2 (Time: 10:50 - 11:20)
TitleBalanced Truncation for Time-Delay Systems Via Approximate Gramians
Author*Xiang Wang, Qing Wang, Zheng Zhang, Quan Chen, Ngai Wong (Univ. of Hong Kong, Hong Kong)
Pagepp. 55 - 60
Detailed information (abstract, keywords, etc)
Slides

1C-3 (Time: 11:20 - 11:50)
TitleEfficient Sensitivity-Based Capacitance Modeling for Systematic and Random Geometric Variations
AuthorYu Bi (Delft Univ. of Tech., Netherlands), Pieter Harpe (Holst Centre/IMEC, Netherlands), *Nick van der Meijs (Delft Univ. of Tech., Netherlands)
Pagepp. 61 - 66
Detailed information (abstract, keywords, etc)
Slides

1C-4 (Time: 11:50 - 12:20)
TitleParallel Statistical Capacitance Extraction of On-Chip Interconnects with an Improved Geometric Variation Model
Author*Wenjian Yu, Chao Hu (Tsinghua Univ., China), Wangyang Zhang (Carnegie Mellon Univ., U.S.A.)
Pagepp. 67 - 72
Detailed information (abstract, keywords, etc)
Slides