Title | (Invited Paper) Automatic Formal Verification of Reconfigurable DSPs |
Author | Miroslav N. Velev, Ping Gao (Aries Design Automation, U.S.A.) |
Page | pp. 293 - 296 |
Detailed information (abstract, keywords, etc) |
Title | (Invited Paper) SoC HW/SW Verification and Validation |
Author | Chung-Yang Huang, Yu-Fan Yin, Chih-Jen Hsu (National Taiwan Univ., Taiwan), Thomas B. Huang, Ting-Mao Chang (InPA Systems, Inc., U.S.A.) |
Page | pp. 297 - 300 |
Detailed information (abstract, keywords, etc) |
Title | (Invited Paper) Utilizing High Level Design Information to Speed up Post-silicon Debugging |
Author | Masahiro Fujita (Univ. of Tokyo and CREST, Japan) |
Page | pp. 301 - 305 |
Detailed information (abstract, keywords, etc) |
Title | (Invited Paper) From RTL to Silicon: The Case for Automated Debug |
Author | Andreas Veneris, Brian Keng (Univ. of Toronto, Canada), Sean Safarpour (Vennsa Technologies, Inc., Canada) |
Page | pp. 306 - 310 |
Detailed information (abstract, keywords, etc) |
Title | (Invited Paper) Multi-Core Parallel Simulation of System-Level Description Languages |
Author | Rainer Dömer, Weiwei Chen, Xu Han (Univ. of California, Irvine, U.S.A.), Andreas Gerstlauer (Univ. of Texas, Austin, U.S.A.) |
Page | pp. 311 - 316 |
Detailed information (abstract, keywords, etc) |