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The 16th Asia and South Pacific Design Automation Conference

Session 3D  Special Session: Recent Advances in Verification and Debug
Time: 16:00 - 18:00 Wednesday, January 26, 2011
Location: Room 416+417
Chair: Chung-Yang (Ric) Huang (National Taiwan Univ., Taiwan)

3D-1 (Time: 16:00 - 16:24)
Title(Invited Paper) Automatic Formal Verification of Reconfigurable DSPs
AuthorMiroslav N. Velev, Ping Gao (Aries Design Automation, U.S.A.)
Pagepp. 293 - 296
Detailed information (abstract, keywords, etc)

3D-2 (Time: 16:24 - 16:48)
Title(Invited Paper) SoC HW/SW Verification and Validation
AuthorChung-Yang Huang, Yu-Fan Yin, Chih-Jen Hsu (National Taiwan Univ., Taiwan), Thomas B. Huang, Ting-Mao Chang (InPA Systems, Inc., U.S.A.)
Pagepp. 297 - 300
Detailed information (abstract, keywords, etc)

3D-3 (Time: 16:48 - 17:12)
Title(Invited Paper) Utilizing High Level Design Information to Speed up Post-silicon Debugging
AuthorMasahiro Fujita (Univ. of Tokyo and CREST, Japan)
Pagepp. 301 - 305
Detailed information (abstract, keywords, etc)

3D-4 (Time: 17:12 - 17:36)
Title(Invited Paper) From RTL to Silicon: The Case for Automated Debug
AuthorAndreas Veneris, Brian Keng (Univ. of Toronto, Canada), Sean Safarpour (Vennsa Technologies, Inc., Canada)
Pagepp. 306 - 310
Detailed information (abstract, keywords, etc)

3D-5 (Time: 17:36 - 18:00)
Title(Invited Paper) Multi-Core Parallel Simulation of System-Level Description Languages
AuthorRainer Dömer, Weiwei Chen, Xu Han (Univ. of California, Irvine, U.S.A.), Andreas Gerstlauer (Univ. of Texas, Austin, U.S.A.)
Pagepp. 311 - 316
Detailed information (abstract, keywords, etc)