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The 17th Asia and South Pacific Design Automation Conference

Session 6C  Modeling and Simulation for Nanoscale Analog Circuits
Time: 8:30 - 10:10 Thursday, February 2, 2012
Location: Room 202
Chairs: Ngai Wong (Univ. of Hong Kong, Hong Kong), Hao Yu (Nanyang Technological Univ., Singapore)

6C-1 (Time: 8:30 - 8:55)
TitleFast Simulation of Hybrid CMOS and STT-MTJ Circuits with Identified Internal State Variables
AuthorYang Shang, Wei Fei, *Hao Yu (Nanyang Technological Univ., Singapore)
Pagepp. 529 - 534
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6C-2 (Time: 8:55 - 9:20)
TitleTime-Domain Performance Bound Analysis of Analog Circuits Considering Process Variations
AuthorXue-Xin Liu, *Sheldon X.-D. Tan, Zhigang Hao (Univ. of California, Riverside, U.S.A.), Guoyong Shi (Shanghai Jiao Tong Univ., China)
Pagepp. 535 - 540
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6C-3 (Time: 9:20 - 9:45)
TitleHierarchical Graph Reduction Approach to Symbolic Circuit Analysis with Data Sharing and Cancellation-Free Properties
AuthorYang Song, *Guoyong Shi (Shanghai Jiao Tong Univ., China)
Pagepp. 541 - 546
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6C-4 (Time: 9:45 - 10:10)
TitleWeakly Nonlinear Circuit Analysis Based on Fast Multidimensional Inverse Laplace Transform
Author*Tingting Wang, Haotian Liu, Yuanzhe Wang, Ngai Wong (Univ. of Hong Kong, Hong Kong)
Pagepp. 547 - 552
Detailed information (abstract, keywords, etc)