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The 17th Asia and South Pacific Design Automation Conference

Session D2  University LSI Design Contest 2
Time: 10:40 - 12:20 Thursday, February 2, 2012
Location: Room 204A

D2-1 (Time: 10:40 - 10:54)
TitleA Reference-Free On-Chip Timing Jitter Measurement Circuit Using Self-Referenced Clock and a Cascaded Time Difference Amplifier in 65nm CMOS
Author*Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Daiki Hirabayashi, Takahiro J. Yamaguchi, Haruo Kobayashi (Gunma Univ., Japan)
Pagepp. 553 - 554
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D2-2 (Time: 10:54 - 11:08)
TitleSimultaneous Data and Power Transmission using Nested Clover Coils
Author*Yasuhiro Take, Hayun Chung, Noriyuki Miura, Tadahiro Kuroda (Keio Univ., Japan)
Pagepp. 555 - 556
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D2-3 (Time: 11:08 - 11:22)
TitleComplexity-Effective Auditory Compensation with a Controllable Filter for Digital Hearing Aids
AuthorYa-Ting Chang, *Kuo-Chiang Chang, Yu-Ting Kuo, Chih-Wei Liu (National Chiao Tung Univ., Taiwan)
Pagepp. 557 - 558
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D2-4 (Time: 11:22 - 11:36)
TitleA Progressive Mixing 20GHz ILFD with Wide Locking Range for Higher Division Ratios
Author*Ahmed Musa, Kenichi Okada, Akira Matsuzawa (Tokyo Inst. of Tech., Japan)
Pagepp. 559 - 560
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D2-5 (Time: 11:36 - 11:50)
TitleA 16-Gb/s Area-Efficient LD Driver with Interwoven Inductor in a 0.18-µm CMOS
Author*Takeshi Kuboki (Kyoto Univ., Japan), Yusuke Ohtomo (NTT, Japan), Akira Tsuchiya (Kyoto Univ., Japan), Keiji Kishine (Univ. of Shiga Prefecture, Japan), Hidetoshi Onodera (Kyoto Univ., Japan)
Pagepp. 561 - 562
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D2-6 (Time: 11:50 - 12:04)
TitleA PVT-robust Feedback Class-C VCO Using an Oscillation Swing Enhancement Technique
Author*Wei Deng, Kenichi Okada, Akira Matsuzawa (Tokyo Inst. of Tech., Japan)
Pagepp. 563 - 564
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D2-7 (Time: 12:04 - 12:18)
TitleA Single-Routing Layered LDPC Decoder for 10Gbase-T Ethernet in 130nm CMOS
Author*Dan Bao, Xubin Chen, Yuebin Huang, Chuan Wu, Yun Chen, Xiao Yang Zeng (Fudan Univ., China)
Pagepp. 565 - 566
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