| Title | (Invited Paper) Abstract System-Level Models for Early Performance and Power Exploration |
| Author | *Andreas Gerstlauer, Suhas Chakravarty, Manan Kathuria, Parisa Razaghi (Univ. of Texas, Austin, U.S.A.) |
| Page | pp. 213 - 218 |
| Detailed information (abstract, keywords, etc) | |
| Title | (Invited Paper) Virtual Prototyping of Cyber-Physical Systems |
| Author | *Wolfgang Mueller, Markus Becker, Ahmed Elfeky (Univ. of Paderborn/C-LAB, Germany), Anthony DiPasquale (Northwestern Univ., U.S.A.) |
| Page | pp. 219 - 226 |
| Detailed information (abstract, keywords, etc) | |
| Title | (Invited Paper) Parallel Discrete Event Simulation of Transaction Level Models |
| Author | *Rainer Doemer, Weiwei Chen, Xu Han (Univ. of California, Irvine, U.S.A.) |
| Page | pp. 227 - 231 |
| Detailed information (abstract, keywords, etc) | |
| Title | (Invited Paper) Post-Silicon Patching for Verification/Debugging with High-Level Models and Programmable Logic |
| Author | *Masahiro Fujita, Hiroaki Yoshida (Univ. of Tokyo/CREST, JST, Japan) |
| Page | pp. 232 - 237 |
| Detailed information (abstract, keywords, etc) | |