Title | (Invited Paper) Bug Localization Techniques for Effective Post-Silicon Validation |
Author | *Subhasish Mitra, David Lin (Stanford Univ., U.S.A.), Nagib Hakim, Don Gardner (Intel Corp., U.S.A.) |
Page | p. 291 |
Detailed information (abstract, keywords, etc) |
Title | (Invited Paper) Improving Validation Coverage Metrics to Account for Limited Observability |
Author | *Peter Lisherness, Kwang-Ting (Tim) Cheng (UCSB, U.S.A.) |
Page | pp. 292 - 297 |
Detailed information (abstract, keywords, etc) |
Title | (Invited Paper) Automated Data Analysis Techniques for a Modern Silicon Debug Environment |
Author | *Yu-Shen Yang (Vennsa Technologies, Canada), Andreas Veneris (Univ. of Toronto, Canada), Nicola Nicolici (McMaster Univ., Canada), Masahiro Fujita (Univ. of Tokyo, Japan) |
Page | pp. 298 - 303 |
Detailed information (abstract, keywords, etc) |
Title | (Invited Paper) Optimizing Test-Generation to the Execution Platform |
Author | Amir Nahir, *Avi Ziv (IBM Research, Israel), Subrat Panda (IBM, India) |
Page | pp. 304 - 309 |
Detailed information (abstract, keywords, etc) |