Technical Program Committee

Technical Program Chair

Yuan Xie (Pennsylvania State University & AMD Research, U.S.A.)

Technical Program Vice Chairs

Nagisa Ishiura (Kwansei Gakuin University, Japan)

Huazhong Yang (Tsinghua University, China)

Secretaries

Yu Wang (Tsinghua University, China)

Yasuhiro Takashima (University of Kitakyushu, Japan)

Subcommittees

* : subcommittee chairs
[1] System-Level Modeling and Simulation/Verification
* Chia-Lin Yang (National Taiwan University, Taiwan)
Derek Chiou (University of Texas at Austin, U.S.A.)
Juinn-Dar Huang (National Chiao Tung University, Taiwan)
Dongrui Fan (Chinese Academy of Science, China)
Makoto Sugihara (Kyushu University, Japan)
Zonghua Gu (Zhejiang University, China)
Lei Wang (University of Connecticut, U.S.A.)
[2] System-Level Synthesis and Optimization
* Kiyoung Choi (Seoul National University, Korea)
Sri Parameswaran (University of New South Wales, Australia)
Yun (Eric) Liang (Advanced Digital Sciences Center (ADSC), Singapore)
Farhad Mehdipour (Kyushu University, Japan)
Sungchan Kim (Chonbuk National University, Korea)
Jiang Xu (Hong Kong University of Science and Technology, Hong Kong)
Yongpan Liu (Tsinghua University, China)
[3] System-Level Memory/Communication Design and Networks on Chip
* David Atienza (EPFL, Switzerland)
Fabien Clermidy (CEA-LETI, France)
Hsien-Hsin Lee (Georgia Institute of Technology, U.S.A.)
Yinhe Han (Chinese Academy of Science, China)
Koji Inoue (Kyushu University, Japan)
Chung-Da King (National Tsing Hua University, Taiwan)
Radu Maculescu (CMU, U.S.A.)
Yi Xu (AMD Research, U.S.A.)
[4] Embedded and Real-Time Systems
* Tei-Wei Kuo (National Taiwan University, Taiwan)
Jian-Jia Chen (Karlsruhe Institute of Technology, Germany)
Qingxu Deng (Northeastern University, China)
Hiroki Matsutani (Keio University, Japan)
Yiran Chen (University of Pittsburgh, U.S.A.)
Nikil Dutt (University of California, Irvine, U.S.A.)
Jason Xue (City University of Hongkong, Hong Kong)
T. John Koo (Chinese Academy of Science, China)
Hiroyuki Tomiyama (Ritsumeikan University, Japan)
Philip Brisk (University of California, Riverside, U.S.A.)
Naeyuck Chang (Seoul National University, Korea)
Li-pin Chang (National Chiao Tung University, Taiwan)
Bernhard Egger (Seoul National University, Korea)
[5] High-Level/Behavioral/Logic Synthesis and Optimization
* Deming Chen (University of Illinois, Urbana-Champaign, U.S.A.)
Robert Wille (University of Bremen, Germany)
Kazuyoshi Takagi (Kyoto University, Japan)
Yajun Ha (National University of Singapore, Singapore)
Yuko Hara-Azumi (Nara Institute of Science and Technology (NAIST), Japan)
Igor Markov (University of Michigan, U.S.A.)
Zhiru Zhang (Xilinx, U.S.A.)
[6] Validation and Verification for Behavioral/Logic Design
* Miroslav Velev (Aries Design Automation, U.S.A.)
Iris Hui-Ru Jiang (National Chiao Tung University, Taiwan)
In-Ho Moon (Synopsys, U.S.A.)
Virendra Singh (Indian Institute of Technology Bombay, India)
[7] Physical Design
* Martin Wong (University of Illinois, Urbana-Champaign, U.S.A.)
Gi-Joon Nam (IBM Research, U.S.A.)
Evangeline Young (Chinese University at Hong Kong, Hong Kong)
Yao-Wen Chang (National Taiwan University, Taiwan)
Sung-Kyu Lim (Georgia Institute of Technology, U.S.A.)
Jia Wang (Illinois Institute of Technology, U.S.A.)
Ting-Chi Wang (National Tsing Hua University, Taiwan)
Toshiyuki Shibuya (Fujitsu Laboratory, Japan)
Yangdong Deng (Tsinghua University, China)
Guojie Luo (Peking University, China)
[8] Timing, Power Thermal Analysis and Optimization
* Masanori Hashimoto (Osaka University, Japan)
Bong-Hyun Lee (Samsung, Korea)
Yuchun Ma (Tsinghua University, China)
Mango Chia-Tso Chao (National Chiao Tung University, Taiwan)
Lih-Yih Chiou (National Cheng Kung University, Taiwan)
Takashi Sato (Kyoto University, Japan)
Yiyu Shi (University of Missouri, U.S.A.)
Jiang Hu (Texas A&M University, U.S.A.)
[9] Signal/Power Integrity, Interconnect/Device/Circuit Modeling and Simulation
* Hai Zhou (Northwestern University, U.S.A.)
Ram Achar (Carleton University, Canada)
Ngai Wong (University of Hong Kong, Hong Kong)
Rung-Bin Lin (Yuan Ze University, Taiwan)
Fan Yang (Fudan University, China)
Wenjian Yu (Tsinghua University, China)
[10] Design for Manufacturability/Yield and Statistical Design
* David Z. Pan (University of Texas, Austin, U.S.A.)
Steven (Chien-Wen) Chen (TSMC, Taiwan)
Srinivas Raghvendra (Synopsys, U.S.A.)
Xuan Zeng (Fudan University, China)
Jae-seok Yang (Samsung, Korea)
[11] Test and Design for Testability
* Huawei Li (Chinese Academy of Science, China)
Yu Huang (Mentor Graphics, U.S.A.)
Jiun-Lang Huang (National Taiwan University, Taiwan)
Yasuo Sato (Kyushu Institute of Technology, Japan)
Yu Hu (Chinese Academy of Science, China)
Dong Xiang (Tsinghua University, China)
[12] Analog, RF and Mixed Signal Design and CAD
* Sheldon Tan (University of California, Riverside, U.S.A.)
Hideki Asai (Shizuoka University, Japan)
Hai Wang (University of Electronic Science and Technology of China, China)
Chien-Nan Jimmy Liu (National Central University, Taiwan)
[13] Emerging Technologies and Applications
* Hai (Helen) Li (Polytechnic Institute of New York University, U.S.A.)
Wei Zhang (Nanyang Technological University, Singapore)
Tsung-Yi Ho (National Cheng Kung University, Taiwan)
Jongsun Park (Korea University, Korea)
Chun-Yao Wang (National Tsing Hua University, Taiwan)
Guangyu Sun (Peking University, China)
Yvain Thonnart (CEA-LETI, France)
Huaqiang Wu (Tsinghua University, China)
Sugama Yasushi (Fujitsu Laboratories LTD, Japan)
Hao Yu (Nanyang Technological University, Singapore)

Last Updated on: October 7, 2012