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The 19th Asia and South Pacific Design Automation Conference

Session 2A  Distributed and Mixed-Criticality Real-Time Systems
Time: 13:50 - 15:30 Tuesday, January 21, 2014
Location: Room 300
Chair: Muhammad Shafique (Karlsruhe Institute of Technology, Germany)

2A-1 (Time: 13:50 - 14:15)
TitleBounding Buffer Space Requirements for Real-Time Priority-Aware Networks
AuthorHany Kashif, *Hiren D. Patel (University of Waterloo, Canada)
Pagepp. 113 - 118
KeywordReal-time, Network-on-Chip, Buffer space
AbstractOne implementation alternative for network interconnects in modern chip-multiprocessor systems is priority-aware arbitration networks. To enable the deployment of real-time applications to priority-aware networks, recent research proposes worst-case latency (WCL) analyses for such networks. Buffer space requirements in priority-aware networks, however, are seldom addressed. In this work, we bound the buffer space required for valid WCL analyses and consequently optimize router design for application specifications by computing the required buffer space at each virtual channel in priority-aware routers. In addition to the obvious advantage of bounding buffer space while providing valid WCL bounds, buffer space reduction decreases chip area and saves energy in priority-aware networks. Our experiments show that the proposed buffer space computation reduces the number of unfeasible implementations by 42% compared to an existing buffer space analysis technique. It also reduces the required buffer space in priority-aware routers by up to 79%.

2A-2 (Time: 14:15 - 14:40)
TitleTask- and Network-Level Schedule Co-Synthesis of Ethernet-Based Time-Triggered Systems
Author*Licong Zhang, Dip Goswami, Reinhard Schneider, Samarjit Chakraborty (TU Munich, Germany)
Pagepp. 119 - 124
KeywordSchedule Optimization, Ethernet, Time-triggered Traffic
AbstractIn this paper, we study time-triggered distributed systems where periodic application tasks are mapped onto different end stations (processing units) communicating over a switched Ethernet network. We address the problem of application level (i.e., both task- and network-level) schedule synthesis and optimization. In this context, most of the recent works [10], [11] either focus on communication schedule or consider a simplified task model. In this work, we formulate the co-synthesis problem of task and communication schedules as a Mixed Integer Programming (MIP) model taking into account a number of Ethernet-specific timing parameters such as interframe gap, precision and synchronization error. Our formulation is able to handle one or multiple timing objectives such as application response time, end-to-end delay and their combinations. We show the applicability of our formulation considering an industrial size case study using a number of different sets of objectives. Further, we show that our formulation scales to systems with reasonably large size.
Slides

2A-3 (Time: 14:40 - 15:05)
TitleService Adaptions for Mixed-Criticality Systems
Author*Pengcheng Huang, Georgia Giannopoulou, Nikolay Stoimenov, Lothar Thiele (ETH Zurich, Switzerland)
Pagepp. 125 - 130
KeywordMixed Criticality, EDF, Online Reconfiguration, Real Time
AbstractComplex embedded systems are typically mixed-critical, where heterogeneous guarantees must be provided for functionalities of different criticalities. We study in this paper the reconfiguration of services provided to low criticality tasks in reaction to the overruns of high criticality tasks. We further investigate the quantification of the resetting time of the system services. For both service reconfiguration and resetting, we derive tight analysis under Earliest Deadline First (EDF) Scheduling.
Slides

2A-4 (Time: 15:05 - 15:30)
TitleEfficient Feasibility Analysis of DAG Scheduling with Real-Time Constraints in the Presence of Faults
Author*Xiaotong Cui, Jun Zhang, Kaijie Wu, Edwin Sha (College of Computer Science,Chongqing University, China)
Pagepp. 131 - 136
KeywordFault tolerance, feasibility test, frame-based real-time system, worst-case analysis, critical task
AbstractTasks in hard real-time systems are required to meet deadlines in the presence of faults. We conclude that a sufficient condition of a task set experiencing its worst-case finish time (WCFT) is that its critical task (CT) incurs all faults. An algorithm is pre-sented to identify the CT and the WCFT in O(N2) with N being the task number. A common practice that bet the WCFT using the task with the longest re-execution time could under estimate by up-to 35%!
Slides