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The 19th Asia and South Pacific Design Automation Conference

Session 5S  Special Session: Billion Chips of Trillion Transistors
Time: 13:50 - 15:30 Wednesday, January 22, 2014
Location: Room 302
Organizer: Chen-Yong Cher (IBM, U.S.A.)

5S-1 (Time: 13:50 - 14:20)
Title(Invited Paper) Soft Error Resiliency Characterization on IBM BlueGene/Q Processor
Author*Chen-Yong Cher, K. Paul Muller, Ruud A. Haring, David L. Satterfield, Thomas E. Musta, Thomas M. Gooding, Kristan D. Davis, Marc B. Dombrowa, Gerard V. Kopcsay, Robert M. Senger, Yutaka Sugawara, Krishnan Sugavanam (IBM, U.S.A.)
Pagepp. 385 - 387
Detailed information (abstract, keywords, etc)

5S-2 (Time: 14:20 - 14:50)
Title(Invited Paper) Resiliency for Many-Core System on a Chip
Author*Tanay Karnik, James Tschanz, Nitin Borkar, Jason Howard, Sriram Vangal, Vivek De, Shekhar Borkar (Intel, U.S.A.)
Pagepp. 388 - 389
Detailed information (abstract, keywords, etc)

5S-3 (Time: 14:50 - 15:20)
Title(Invited Paper) Rethinking Error Injection for Effective Resilience
AuthorShahrzad Mirkhani (Univ. of Texas, U.S.A.), Hyungmin Cho, Subhasish Mitra (Stanford Univ., U.S.A.), *Jacob Abraham (Univ. of Texas, U.S.A.)
Pagepp. 390 - 393
Detailed information (abstract, keywords, etc)
Slides