(Go to Top Page)

The 19th Asia and South Pacific Design Automation Conference
Technical Program

Remark: The presenter of each paper is marked with "*".
Technical Program:   SIMPLE version   DETAILED version with abstract    One Page (Not Separated) version
Author Index:   HERE

Session Schedule


Tuesday, January 21, 2014

Room 302Room 300Room 301Room 303
1K  (Room 300)
Opening & Keynote I

8:30 - 10:00
Break
10:00 - 10:40
1S  Special Session: Normally-Off Computing: Towards Zero Stand-by Power Management
10:40 - 12:20
1A  University Design Contest
10:40 - 12:20
1B  Planning and Placement for Design Closure and Manufacturability
10:40 - 12:20
1C  Circuit, Architecture, and System for Emerging Technologies
10:40 - 12:20
Lunch Break
12:20 - 13:50
2S  Special Session: EDA for Energy
13:50 - 15:30
2A  Distributed and Mixed-Criticality Real-Time Systems
13:50 - 15:30
2B  Advanced Patterning for Advanced Layout
13:50 - 15:30
2C  Timing-Driven Design, Modeling, and Optimization
13:50 - 15:30
Break
15:30 - 15:50
3S  Special Session: Neuron Inspired Computing using Nanotechnology
15:50 - 17:30
3A  Synthesis and Exploration Techniques for Computing Platforms
15:50 - 17:30
3B  Advances in Microfluidic Biochips
15:50 - 17:30
3C  Advanced Modeling and Simulation Techniques for Analog/Mixed-Signal Circuits
15:50 - 17:30



Wednesday, January 22, 2014

Room 302Room 300Room 301Room 303
2K  (Room 300)
Keynote II

8:30 - 9:30
Break
9:30 - 10:10
4S  Special Session: Design Automation Methods for Highly-Complex Multimedia Systems
10:10 - 12:15
4A  System-Level Thermal and Power Optimization Techniques
10:10 - 12:15
4B  Emerging Techniques for Future NoC
10:10 - 12:15
4C  Emerging Applications
10:10 - 12:15
Lunch Break
12:15 - 13:50
5S  Special Session: Billion Chips of Trillion Transistors
13:50 - 15:30
5A  Simulation and Modeling
13:50 - 15:30
5B  Reliability Analysis and Enhencement
13:50 - 15:30
5C  Variational Design Techniques for Analog/Mixed-Signal Circuits
13:50 - 15:30
Break
15:30 - 15:50
6S  Special Session: Overcoming Major Silicon Bottlenecks: Variability, Reliability, Validation and Debug
15:50 - 17:30
6A  Synthesis of Quantum Circuits and Adaptive Logic
15:50 - 17:30
6B  Contemporary Routing
15:50 - 17:30
6C  Power Supply Noise Aware Design Optimization
15:50 - 17:30
Break
17:30 - 18:30
BK  (Flower Field Hall, Gardens by the Bay)
Banquet & Banquet Keynote

18:30 - 21:00



Thursday, January 23, 2014

Room 302Room 300Room 301Room 303
3K  (Room 300)
Keynote III

8:30 - 9:30
Break
9:30 - 10:10
7S  Special Session: Brain Like Computing: Modelling, Technology, and Architecture
10:10 - 12:15
7A  Power and Life Time Issues of Memory Subsystem
10:10 - 12:15
7B  Advances in High-Level and Logic Synthesis
10:10 - 12:15
7C  Advanced Test Solutions
10:10 - 12:15
Lunch Break
12:15 - 13:50
8S  Special Session: Design Flow for Integrated Circuits using Magnetic Tunnel Junction Switched by Spin Orbit Torque
13:50 - 15:30
8A  Analysis, Optimization, and Scheduling for Multiprocessor Platforms
13:50 - 15:30
8B  Advances in Formal Verification and Debugging
13:50 - 15:30
8C  Advances in CAD Techniques for Signal Integrity
13:50 - 15:30
Break
15:30 - 15:50
9S  Special Session: The Role of Photons in Harming or Increasing Security
15:50 - 17:30
9A  System-Level Verification
15:50 - 17:30
9B  Modeling and Evaluator for Emerging Technologies
15:50 - 17:30
9C  Design and Simulation Toward Power and Temperature Awareness
15:50 - 17:30