| Title | Quantitative Modeling of Racetrack Memory, A Tradeoff among Area, Performance, and Power |
| Author | *Chao Zhang, Guangyu Sun, Weiqi Zhang (Peking Univ., China), Fan Mi, Hai Li (Univ. of Pittsburgh, U.S.A.), Weisheng Zhao (Beihang Univ., China) |
| Page | pp. 100 - 105 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication |
| Author | *Peng Gu, Boxun Li, Tianqi Tang (Tsinghua Univ., China), Shimeng Yu, Yu Cao (Arizona State Univ., U.S.A.), Yu Wang, Huazhong Yang (Tsinghua Univ., China) |
| Page | pp. 106 - 111 |
| Detailed information (abstract, keywords, etc) | |
| Title | Modeling Framework for Cross-Point Resistive Memory Design Emphasizing Reliability and Variability Issues |
| Author | Yang Zheng, Cong Xu (Pennsylvania State Univ., U.S.A.), *Yuan Xie (Pennsylvania State Univ./Univ. of California, Santa Barbara, U.S.A.) |
| Page | pp. 112 - 117 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Defect-Aware Approach for Mapping Reconfigurable Single-Electron Transistor Arrays |
| Author | *Ching-Yi Huang, Chian-Wei Liu, Chun-Yao Wang (National Tsing Hua Univ., Taiwan), Yung-Chih Chen (Yuan Ze Univ., Taiwan), Suman Datta, Vijaykrishnan Narayanan (Pennsylvania State Univ., U.S.A.) |
| Page | pp. 118 - 123 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |