| Title | An HDL-Synthesized Gated-Edge-Injection PLL with A Current Output DAC |
| Author | *Dongsheng Yang, Wei Deng, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa (Tokyo Inst. of Tech., Japan) |
| Page | pp. 2 - 3 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | An Oscillator-Based True Random Number Generator with Process and Temperature Tolerance |
| Author | Takehiko Amaki, *Masanori Hashimoto, Takao Onoye (Osaka Univ., Japan) |
| Page | pp. 4 - 5 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Implementation of Double Arbiter PUF and Its Performance Evaluation on FPGA |
| Author | *Takanori Machida (Univ. of Electro-Communications, Japan), Dai Yamamoto (Fujitsu Labs., Japan), Mitsugu Iwamoto, Kazuo Sakiyama (Univ. of Electro-Communications, Japan) |
| Page | pp. 6 - 7 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Negative-Resistance Sense Amplifier for Low-Voltage Operating STT-MRAM |
| Author | *Yohei Umeki, Koji Yanagida (Kobe Univ., Japan), Shusuke Yoshimoto (Stanford Univ., U.S.A.), Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ., Japan), Koji Tsunoda, Toshihiro Sugii (Low-Power Electronics Association and Project (LEAP), Japan) |
| Page | pp. 8 - 9 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A High Stability, Low Supply Voltage and Low Standby Power Six-Transistor CMOS SRAM |
| Author | *Nobuaki Kobayashi, Ryusuke Ito, Tadayoshi Enomoto (Chuo Univ., Japan) |
| Page | pp. 10 - 11 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | An Efficient Multi-Port Memory Controller for Multimedia Applications |
| Author | *Xuan-Thuan Nguyen, Cong-Kha Pham (Univ. of Electro-Communications, Japan) |
| Page | pp. 12 - 13 |
| Detailed information (abstract, keywords, etc) | |
| Title | Reliability-Configurable Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis |
| Author | *Masanori Hashimoto, Dawood Alnajjar, Hiroaki Konoura (Osaka Univ./JST, CREST, Japan), Yukio Mitsuyama (Kochi Univ. of Tech./JST, CREST, Japan), Hajime Shimada (Nagoya Univ./JST, CREST, Japan), Kazutoshi Kobayashi (Kyoto Inst. of Tech./JST, CREST, Japan), Hiroyuki Kanbara (ASTEM/JST, CREST, Japan), Hiroyuki Ochi (Ritsumeikan Univ./JST, CREST, Japan), Takashi Imagawa (Kyoto Univ./JST, CREST, Japan), Kazutoshi Wakabayashi (NEC/JST, CREST, Japan), Takao Onoye (Osaka Univ./JST, CREST, Japan), Hidetoshi Onodera (Kyoto Univ./JST, CREST, Japan) |
| Page | pp. 14 - 15 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A 14μA ECG Processor with Noise Tolerant Heart Rate Extractor and FeRAM for Wearable Healthcare Systems |
| Author | *Yozaburo Nakai, Shintaro Izumi, Ken Yamashita, Masanao Nakano, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ., Japan) |
| Page | pp. 16 - 17 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A 128-Way FPGA Platform for the Acceleration of KLMS Algorithm |
| Author | *Xiaowei Ren, Qihang Yu, Badong Chen, Nanning Zheng, Pengju Ren (Xi'an Jiaotong Univ., China) |
| Page | pp. 18 - 19 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A Real-Time Permutation Entropy Computation for EEG Signals |
| Author | *Xiaowei Ren, Qihang Yu, Badong Chen, Nanning Zheng, Pengju Ren (Xi'an Jiaotong Univ., China) |
| Page | pp. 20 - 21 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A High Efficient Hardware Architecture for Multiview 3DTV |
| Author | *Jiang Yu, Geng Liu, Xin Zhang, Pengju Ren (Xi'an Jiaotong Univ., China) |
| Page | pp. 22 - 23 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Design of A Scalable Many-Core Processor for Embedded Applications |
| Author | *Hsiao-Wei Chien, Jyun-Long Lai, Chao-Chieh Wu, Chih-Tsun Huang, Ting-Shuo Hsu, Jing-Jia Liou (National Tsing Hua Univ., Taiwan) |
| Page | pp. 24 - 25 |
| Detailed information (abstract, keywords, etc) | |
| Title | A DPA/DEMA/LEMA-Resistant AES Cryptographic Processor with Supply-Current Equalizer and Micro EM Probe Sensor |
| Author | *Daisuke Fujimoto, Noriyuki Miura (Kobe Univ., Japan), Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki (Tohoku Univ., Japan), Makoto Nagata (Kobe Univ., Japan) |
| Page | pp. 26 - 27 |
| Detailed information (abstract, keywords, etc) | |
| Title | A 64×64 1200fps Dual-Mode CMOS Ion-Image Sensor for Accurate DNA Sequencing |
| Author | *Xiwei Huang, Jing Guo, Mei Yan, Hao Yu (Nanyang Technological Univ., Singapore) |
| Page | pp. 28 - 29 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A 0.21-V Minimum Input, 73.6% Maximum Efficiency, Fully Integrated 3-Terminal Voltage Converter with MPPT for Low-Voltage Energy Harvesters |
| Author | *Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa (Kobe Univ., Japan) |
| Page | pp. 30 - 31 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Dual-Output Wireless Power Delivery System for Small Size Large Volume Wireless Memory Card |
| Author | *Junki Hashiba, Toru Kawajiri, Yuya Hasegawa, Hiroki Ishikuro (Keio Univ., Japan) |
| Page | pp. 32 - 33 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A Tri-Level 50MS/s 10-bit Capacitive-DAC for Bluetooth Applications |
| Author | *Daisuke Kanemoto (Univ. of Yamanashi, Japan), Keigo Oshiro, Keiji Yoshida, Haruichi Kanaya (Kyushu Univ., Japan) |
| Page | pp. 34 - 35 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Tail-Current Modulated VCO with Adaptive-Bias Scheme |
| Author | *Aravind Tharayil Narayanan, Wei Deng, Kenichi Okada, Akira Matsuzawa (Tokyo Inst. of Tech., Japan) |
| Page | pp. 36 - 37 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A Low-Power VCO Based ADC with Asynchronous Sigma-Delta Modulator in 65nm CMOS |
| Author | *Jili Zhang, Chenluan Wang, Shengxi Diao, Fujiang Lin (Univ. of Science and Tech. of China, China) |
| Page | pp. 38 - 39 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A 0.5-V 5.8-GHz Low-Power Asymmetrical QPSK/OOK Transceiver for Wireless Sensor Network |
| Author | *Sho Ikeda, Sang_yeop Lee, Shin Yonezawa, Yiming Fang, Motohiro Takayasu, Taisuke Hamada, Yosuke Ishikawa, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu (Tokyo Inst. of Tech., Japan) |
| Page | pp. 40 - 41 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A 58.3-to-65.4 GHz 34.2 mW Sub-Harmonically Injection-Locked PLL with a Sub-Sampling Phase Detection |
| Author | *Teerachot Siriburanon, Tomohiro Ueno, Kento Kimura, Satoshi Kondo, Wei Deng, Kenichi Okada, Akira Matsuzawa (Tokyo Inst. of Tech., Japan) |
| Page | pp. 42 - 43 |
| Detailed information (abstract, keywords, etc) | |
| Title | Circuit and Package Design for 44GB/s Inductive-Coupling DRAM/SoC Interface |
| Author | *Akira Okada, Abdul Raziz Junaidi, Yasuhiro Take, Atsutake Kosuge, Tadahiro Kuroda (Keio Univ., Japan) |
| Page | pp. 44 - 45 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Design and Analysis for ThruChip Design for Manufacturing (DFM) |
| Author | *Li-Chung Hsu, Yasuhiro Take, Atsutake Kosuge, So Hasegawa, Junichiro Kadamoto, Tadahiro Kuroda (Keio Univ., Japan) |
| Page | pp. 46 - 47 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |