| Title | Multilane Racetrack Caches: Improving Efficiency Through Compression and Independent Shifting |
| Author | *Haifeng Xu (Univ. of Pittsburgh, U.S.A.), Yong Li (VMware, U.S.A.), Rami Melhem, Alex K. Jones (Univ. of Pittsburgh, U.S.A.) |
| Page | pp. 417 - 422 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Managing Hybrid On-Chip Scratchpad and Cache Memories for Multi-Tasking Embedded Systems |
| Author | Zimeng Zhou, *Lei Ju, Zhiping Jia, Xin Li (Shandong Univ., China) |
| Page | pp. 423 - 428 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Optimizing Thread-to-Core Mapping on Manycore Platforms with Distributed Tag Directories |
| Author | *Guantao Liu, Tim Schmidt, Rainer Doemer (Univ. of California, Irvine, U.S.A.), Ajit Dingankar, Desmond Kirkpatrick (Intel, U.S.A.) |
| Page | pp. 429 - 434 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Accelerating Non-Volatile/Hybrid Processor Cache Design Space Exploration for Application Specific Embedded Systems |
| Author | *Mohammad Shihabul Haque, Ang Li, Akash Kumar (National Univ. of Singapore, Singapore), Qingsong Wei (Data Storage Institute, Singapore) |
| Page | pp. 435 - 440 |
| Detailed information (abstract, keywords, etc) | |