Title | Useful Clock Skew Scheduling Using Adjustable Delay Buffers in Multi-Power Mode Designs |
Author | *Juyeon Kim, Taewhan Kim (Seoul National Univ., Republic of Korea) |
Page | pp. 466 - 471 |
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Title | Fast Clock Skew Scheduling Based on Sparse-Graph Algorithms |
Author | *Rickard Ewetz (Purdue Univ., U.S.A.), Shankarshana Janarthanan (NVIDIA, U.S.A.), Cheng-Kok Koh (Purdue Univ., U.S.A.) |
Page | pp. 472 - 477 |
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Slides |
Title | Modeling and Optimization of Low Power Resonant Clock Mesh |
Author | *Wulong Liu (Tsinghua Univ., China), Guoqing Chen (Research Lab, Advanced Micro Devices, China), Yu Wang, Huazhong Yang (Tsinghua Univ., China) |
Page | pp. 478 - 483 |
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Title | Synthesis of Resonant Clock Networks Supporting Dynamic Voltage / Frequency Scaling |
Author | *Seyong Ahn, Minseok Kang (Seoul National Univ., Republic of Korea), Marios C. Papaefthymiou (Univ. of Michigan, U.S.A.), Taewhan Kim (Seoul National Univ., Republic of Korea) |
Page | pp. 484 - 489 |
Detailed information (abstract, keywords, etc) | |
Slides |