Special Sessions

  • Date: January 20 - 22, 2015
  • Place: Makuhari Messe, International Conference Hall, 1F
Date/Time Title
1D Tuesday, January 20/
10:30-12:10		 Presentation + Poster Discussion: "University LSI Design Contest"
2S Tuesday, January 20/
13:50-15:30		 Invited Talks: "Internet of Things"
3S Tuesday, January 20/
15:50-17:30		 Invited Talks: "New Challenges and Solutions in Nanometer Physical Design"
4S Wednesday, January 21/
10:15-12:20		 Invited Talks: "Machine Learning in EDA: Promises and Challenges in Selected Applications"
7S Thursday, January 22/
10:15-2:20		 Invited Talks: "The Future of Emerging ReRAM Technology"
9B Thursday, January 22/
15:50-17:30		 Invited Talks: "System-Level Designs and Tools for Multicore Systems"

1D: Tuesday, January 20, 10:30-12:10

Presentation + Poster Discussion: "University LSI Design Contest"

2S: Tuesday, January 20, 13:50-15:30

Invited Talks: "Internet of Things"
Organizer: Li Shang (Univ. of Colorado Boulder, U.S.A.)
  • 1: Powering the IoT: Storage-Less and Converter-Less Energy Harvesting
    Hyung Gyu Lee (Daegu Univ., Republic of Korea), Naehyuck Chang (KAIST, Republic of Korea)
  • 2: Distributed Computing in IoT: System-on-a-Chip for Smart Cameras as an Example
    Shao-Yi Chien, Wei-Kai Chan, Yu-Hsiang Tseng (National Taiwan Univ., Taiwan), Chia-Han Lee (Academia Sinica, Taiwan), V. Srinivasa Somayazulu, Yen-Kuang Chen (Intel, U.S.A.)
  • 3: Data Sensing and Analysis: Challenges for Wearables
    James Williamson, Qi Liu, Fenglong Lu, Wyatt Mohrman, Kun Li (Univ. of Colorado Boulder, U.S.A.), Robert P. Dick (Univ. of Michigan, U.S.A.), Li Shang (Univ. of Colorado Boulder, U.S.A.)

3S: Tuesday, January 20, 15:50-17:30

Invited Talks: "New Challenges and Solutions in Nanometer Physical Design"
Organizer: Mark Po-Hung Lin (National Chung Cheng Univ., Taiwan)
  • 1: An Efficient Linear Time Triple Patterning Solver
    Haitong Tian (Univ. Illinois, Urbana-Champaign, U.S.A.), Hongbo Zhang (Synopsys Inc., U.S.A.), Zigang Xiao, Martin D. F. Wong (Univ. of Illinois, Urbana-Champaign, U.S.A.)
  • 2: Gate Sizing and Threshold Voltage Assignment for High Performance Microprocessor Designs
    Tiago Reimann, (UFRGS, Brazil), Cliff C. N. Sze (IBM, U.S.A.), Ricardo Reis (UFRGS, Brazil)
  • 3: Analytical Placement for Rectilinear Blocks
    Yasuhiro Takashima (Univ. of Kitakyushu, Japan)
  • 4: IR to Routing Challenge and Solution for Interposer-Based Design
    Eric Jia-Wei Fang, Terry Chi-Jih Shih, Darton Shen-Yu Huang (MediaTek, Taiwan)

4S: Wednesday, January 21, 10:15-12:20

Invited Talks: "Machine Learning in EDA: Promises and Challenges in Selected Applications"
Organizer: Li-C. Wang (Univ. of California, Santa Barbara, U.S.A.)
  • 1: Machine Learning and Pattern Matching in Physical Design
    Bei Yu, David Z. Pan (Univ. of Texas, Austin, U.S.A.), Tetsuaki Matsunawa (Toshiba, Japan), Xuan Zeng (Fudan Univ., China)
  • 2: Self-Learning and Adaptive Board-Level Functional Fault Diagnosis
    Fangming Ye, Krishnendu Chakrabarty (Duke Univ., U.S.A.), Zhaobo Zhang, Xinli Gu (Huawei Technologies, U.S.A.)
  • 3: Fast Statistical Analysis of Rare Failure Events for Memory Circuits in High-Dimensional Variation Space
    Shupeng Sun, Xin Li (Carnegie Mellon Univ., U.S.A.)
  • 4: Data Mining in Functional Test Content Optimization
    Li-C. Wang (Univ. of California, Santa Barbara, U.S.A.)

7S: Thursday, January 22, 10:15-12:20

Invited Talks: "The Future of Emerging ReRAM Technology"
Organizers: Guangyu Sun (Peking Univ., China), Yuan Xie (Univ. of California, Santa Barbara, U.S.A.)
  • 1: Toward Large-Scale Access-Transistor-Free Memristive Crossbars
    Amirali Ghofrani, Miguel Angel Lastras-Montaño, K.-T. Tim Cheng (Univ. of California, Santa Barbara, U.S.A.)
  • 2: Read Circuits for Resistive Memory (ReRAM) and Memristor-Based Nonvolatile Logics
    Meng-Fan Chang, Albert Lee, Chien-Chen Lin (National Tsing Hua Univ., Taiwan), Mon-Shu Ho (National Chung Hsin Univ., Taiwan), Ping-Cheng Chen (I-Shou Univ., Taiwan), Chia-Chen Kuo, Ming-Pin Chen, Pei-Ling Tseng, Tzu-Kun Ku (ITRI, Taiwan), Chien-Fu Chen, Kai-Shin Li, Jia-Min Shieh (NDL, Taiwan)
  • 3: 3D ReRAM with Field Assisted Super-Linear Threshold (FASTTM) Selector Technology for Super-Dense, Low Power, Low Latency Data Storage Systems
    Sung Hyun Jo, Tanmay Kumar, Mehdi Asnaashari, Wei D. Lu, Hagop Nazarian (Crossbar Inc., U.S.A.)
  • 4: Modeling and Design Optimization of ReRAM
    J. F. Kang, H. T. Li, P. Huang, Z. Chen, B. Gao, X. Y. Liu (Peking Univ., China), Z. Z. Jiang, H.-S. P. Wong (Stanford Univ., U.S.A.)

9B: Thursday, January 22, 15:50-17:30

Invited Talks: "System-Level Designs and Tools for Multicore Systems"
Organizer: Chung-Ta King (National Tsing Hua Univ., Taiwan)
  • 1: Heterogeneous Architecture Design with Emerging 3D and Non-Volatile Memory Technologies
    Qiaosha Zou, Matthew Poremba (Pennsylvania State Univ., U.S.A.), Rui He, Wei Yang, Junfeng Zhao (Huawei Shannon Lab, China), Yuan Xie (Univ. of California, Santa Barbara, U.S.A.)
  • 2: Alleviate Chip I/O Pin Constraints for Multicore Processors through Optical Interconnects
    Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan H.K. Duong, Zhifei Wang, Haoran Li, Rafael K.V. Maeda, Xiaowen Wu (Hong Kong University of Science and Technology, Hong Kong), Yaoyao Ye, Qinfen Hao (Huawei Technologies, China)
  • 3: A Fast and Accurate Network-on-Chip Timing Simulator with a Flit Propagation Model
    Ting-Shuo Hsu, Jun-Lin Chiu, Chao-Kai Yu, Jing-Jia Liou (National Tsing Hua Univ., Taiwan)
  • 4: Application-Level Embedded Communication Tracer for Many-Core Systems
    Chih-Tsun Huang, Kuan-Chun Tasi, Jun-Shen Lin, Hsiao-Wei Chien (National Tsing Hua Univ., Taiwan)

Last Updated on: October 30, 2014