(Back to Session Schedule)

The 21st Asia and South Pacific Design Automation Conference

Session 2S  (Special Session) Designing with Spintronics: Recent Developments and Upcoming Challenges
Time: 13:50 - 15:30 Tuesday, January 26, 2016
Location: TF4303
Organizer/Chair: Sachin S. Sapatnekar (Univ. of Minnesota, U.S.A.)

2S-1 (Time: 13:50 - 14:20)
Title(Invited Paper) Logic and Memory Design using Spin-based Circuits
Author*Zhaoxin Liang, Meghna Mankalale, Brandon Del Bel, Sachin S. Sapatnekar (Univ. of Minnesota, U.S.A.)
Pagepp. 103 - 108
Detailed information (abstract, keywords, etc)

2S-2 (Time: 14:20 - 14:50)
Title(Invited Paper) Architecture Design with STT-RAM: Opportunities and Challenges
AuthorPing Chi, Shuangchen Li, Yuanqing Cheng (Univ. of California, Santa Barbara, U.S.A.), Yu Lu, Seung H. Kang (Qualcomm Incorporated, U.S.A.), *Yuan Xie (Univ. of California, Santa Barbara, U.S.A.)
Pagepp. 109 - 114
Detailed information (abstract, keywords, etc)

2S-3 (Time: 14:50 - 15:20)
Title(Invited Paper) Prospects of Efficient Neural Computing with Arrays of Magneto-metallic Neurons and Synapses
AuthorAbhronil Sengupta, Karthik Yogendra, Deliang Fan, *Kaushik Roy (Purdue Univ., U.S.A.)
Pagepp. 115 - 120
Detailed information (abstract, keywords, etc)