Highlights

Last Updated: 18 January 2001

Keynote Addresses

Wednesday, January 31, 2001, 9:30 - 10:30, Room 303/304

"Role of the Semiconductor Industry in the 21st Century

= Human Talent Is the Heart of the Information Society ="

Hajime Sasaki - NEC Corporation, Japan

Thursday, February 1, 2001, 9:00 - 10:00, Room 303/304

"Market and Technology in PC Products"

Ming-Jeh Chien - First International Computer, Taiwan

Friday, February 2, 2001, 9:00 - 10:00, Room 303/304

"EDA Must Deliver System-on-Chip Design Solutions"

Raul Camposano - Synopsys, Inc., USA

Special Sessions

Wednesday, January 31, 2001, 10:45 - 12:15, Room 303/304

Executive Panel Discussion:
Secrets to Success in a Start-Up EDA Business
Organizer: T. Kozawa - STARC, Japan
Moderator: J. Goodsel - Simplex Solutions and CoWare
Panelists: S. S. Wang - NAssda Corp.
  B. Rosenthal - Tensilica
  D. Fairbairn - Simutech Corp.
  M. Tsai - Axis
  H. Hasegawa - HD Lab.

Wednesday, January 31, 2001, 13:30 - 15:30, Room 301

A1 : "University LSI Design Contest"

Short Presentations and Poster Discussions
Co-Chairs: H. Onodera - Kyoto Univ., Japan
  S. K. Nandy - Indian Institute of Science, India
  T. Kuroda - Keio Univ., Japan

Thursday, February 1, 2001, 10:45 - 12:15, Room 303

E3 : "Asynchronous System Design : Architecture and Low-Power Design"
Co-Chairs: T. Yoneda - Tokyo Institute of Technology, Japan
  D.-I. Lee - Kwangju Institute of Science and Technology, Korea

 

"Asynchronous Technologies for Low Power Design Using Tangram Framework"

J. Kessels - Philips, Netherlands

"Imprecise Data Computation for High Performance Asynchronous Processors"

J.-G. Lee, E. Kim, D.-I. Lee - Kwangju Institute of Science and Technology, Korea

 

Thursday, February 1, 2001, 13:30 - 15:30, Room 301

A4 : (Panel) : "Beyond the Red Brick Wall:
Challenges and Solutions in 50nm Physical Design"

Moderator: Hidetoshi Onodera - Kyoto Univ.
Panelists: Andrew B. Kahng - UC San Diego
  Wayne W. M. Dai - UC Santa Cruz
  Sani Nassif - IBM Austin Research Lab
  Juho Kim - Sogang Univ.
  >Akira Tanabe - NEC
  Toshihiro Hattori - Hitachi Ltd

Thursday, February 1, 2001, 13:30 - 15:30, Room 303

E4 : "Asynchronous System Design : Verification"
Co-Chairs: T. Nanya - Univ. of Tokyo, Japan
  J. Kessels - Philips Research, Netherlands

 

"Timed Circuits: A New Paradigm for High-Speed Design"

C. Myrs - Univ. of Utah, USA

"Conformance and Mirroring for Timed Asynchronous Circuits"

B. Zhou, T. Yoneda - Tokyo Institute of Technology, Japan
B-H. Schlingloff - Univ. Bremen, Germany

"Formal Verification of Pulse-Mode Circuits"

X. Kong, R. Negulescu - McGill Univ., Canada

 

Thursday, February 1, 2001, 16:00 - 17:30, Room 303

E5 : "Asynchronous System Design : Synthesis"
Co-Chairs: C. Myers - Univ. of Utah, USA
  Y. Sato - Okayama Prefectural Univ., Japan

 

"Synthesis of Two-Phase Asynchronous Control Circuits from Pipeline Dependency Graphs"

H. Kagotani, T. Okamoto- Okayama Univ., Japan
T. Nanya- Univ. of Tokyo, Japan

"High-Level Design for Asynchronous Logic"

R. Smith, M. Lighart - Theseus Logic, USA

"Eliminating Isochronic-Fork Constraints in Quasi-Delay-Insensitive Circuits"

N. Sretasereekul, T. Nanya - Univ. of Tokyo, Japan

 

 

Invited Talks

B1.3 Jan. 31 (Wed), 14:30 - 15:30, Room 302

"Precise Extraction of Ultra Deep Submicron Interconnect Parasitics with Parametrizable 3D - Modeling"

M. R. Frerichs - Infineon Technologies, Germany

C2.1 Jan. 31 (Wed), 16:00 - 17:00, Room 311/312

"A C-based synthesis system, Bach, and its Application"

T. Kambe, A. Yamada, K. Nishida, K. Okada, M. Ohnishi - Sharp Corp., Japa n
A. Kay, V. Zammit, P. Boca, T. Nomura - Sharp Labs of Europe, UK

C4.1 Feb. 1 (Thu), 13:30 - 14:30, Room 311/312

"Low Power Design Challenges for the Decade"

S. Borkar - Intel, USA

A6 Feb. 2 (Fri), 10:30 - 12:00, Room 301

"Design Technology Productivity in the DSM Era"

A. B. Kahng - UC San Diego, USA

 

Embedded Tutorials

 

B2.3 Jan. 31 (Wed), 17:00 - 18:00, Room 302

"Modeling and Forecasting of Manufacturing Variations"

S. R. Nassif - IBM Austin Research Lab., USA

D3.1 Feb. 1 (Thu), 10:30 - 11:15, Room 313/314

"Power Optimization and Management in Embedded Systems"

M. Pedram - Univ. of Southern California, USA

E3.1 Feb. 1 (Thu), 10:45 - 11:45, Room 303

" The Tangram Framework: Asynchronous Circuits for Low Power"

J. Kessels, A. Peeters - Philips Research Labs, Netherlands

D4.1 Feb. 1 (Thu), 13:30 - 14:15, Room 313/314

"Towards the Logical Defect Diagnosis for Partial-Scan Designs"

S. -Y. Huang - National Tsing Hua Univ., Taiwan

E4.1 Feb. 1 (Thu), 13:30 - 14:30, Room 303

"Timed Circuits: A New Paradigm for High-Speed Design"

C. J. Myers, W. Belluomini, K. Killpack, E. Mercer, E. Peskin, H. Zheng - Univ. of Utah, USA

B4.4 Feb. 1 (Thu), 15:00 - 15:30, Room 302

"A Mixed-Signal Simulator for VHDL-AMS"

X. Liyi, L. Bin, Y. Yizheng - Harbin Institute of Technology, China
H. Guoyong, G. Jinjun, Z. Peng - China Fuada IC Design Center, China

D5.1 Feb. 1 (Thu), 16:00 - 16:45, Room 313/314

"New Directions in Compiler Technology for Embedded Systems"

N. Dutt, A. Nicolau, H. Tomiyama and A. Halambi - Univ. of California at Irvine, USA

C7.3 Feb. 2 (Fri), 14:30 - 15:30, Room 311/312

"Coarse Grain Reconfigurable Architecture"

R. Hartenstein - Univ. of Kaiserslautern, Germany

 

Five Full-Day Tutorials

Tuesday, January 30, 2001, 9:30 - 17:00
  1. SpecC: Specification Language and Design Methodology
    Organizer: Daniel Gajski - Univ. of California, Irvine, USA
    Speakers: Tadatoshi Ishii - SpecC Consortium, Japan,
      Jianwen Zhu - Univ. of Toronto, Canada,
      Andreas Gerstlauer - Univ. of California, Irvine, USA,
      Mike Olivarez - Motorola,
      Chuck Siska - Conexant, USA,
      Dai Araki - Toshiba Corp., Japan,
      Daniel Gajski - Univ. of California, Irvine, USA
  2. Software Development Methods for Embedded Systems
    Organizers: Masaharu Imai - Osaka Univ., Japan,
      Norihiko Yoshida - Nagasaki Univ., Japan
    Speakers: Steve Schulz - Texas Instruments, USA,
      Yoshihiro Matsumoto - Musashi Institute of Technology,
      Hiroaki Takada - Toyohashi Univ. of Technology, Japan,
      Peter Marwedel - Univ. of Dortmund, Germany
  3. Timing Closure for Ultra Deep Submicron Designs
    Organizers: Jason Cong - Univ. of California, Los Angels, USA,
      Patrick Groeneveld - Magma Design Automation Inc., USA
    Speakers: Anthony Drumm - IBM Corp., USA,
      Patrick Groeneveld - Magma Design Automation Inc., USA,
      Olivier Coudert - Monterey Design Systems, USA,
      Jason Cong - Univ. of California, Los Angels, USA
  4. IP Authoring and SOC Integration, Verification, and Testing
    Organizer: Youn-Long Lin - National Tsing Hua Univ., Taiwan
    Speakers: Kuo-Hwa Wang - Fu Jen Catholic Univ. and Global UniChip Corp., Taiwan,
      Juinn-Dar Huang - Global UniChip Corp., Taiwan,
      Jing-Yang Jou - National Chiao Tung University, Taiwan,
      Cheng-Wen Wu - National Tsing Hua University, Taiwan
  5. Design and Tools for Networked System-on-Chip
    Organizer: Rajesh K. Gupta - Univ. of California, Irvine, USA
    Speakers: Charles Chien - Rockwell Science Center and Univ. of California Los Angeles, USA,
      Rajesh K. Gupta - Univ. of California, Irvine, USA