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The 14th Asia and South Pacific Design Automation Conference

Session 2B  Power Analysis and Optimization
Time: 13:30 - 15:35 Tuesday, January 20, 2009
Location: Room 413
Chair: Masanori Hashimoto (Osaka Univ., Japan)

2B-1 (Time: 13:30 - 13:55)
TitleStatistical Modeling and Analysis of Chip-Level Leakage Power by Spectral Stochastic Method
AuthorRuijing Shen, Ning Mi, *Sheldon Tan (Univ. of California, Riverside, United States), Yici Cai, Xianlong Hong (Tsinghua Univ., China)
Pagepp. 161 - 166
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2B-2 (Time: 13:55 - 14:20)
TitleOn the Futility of Statistical Power Optimization
AuthorJason Cong, Puneet Gupta, *John Lee (Univ. of California, Los Angeles, United States)
Pagepp. 167 - 172
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2B-3 (Time: 14:20 - 14:45)
TitleTiming Driven Power Gating in High-Level Synthesis
AuthorShih-Hsu Huang, *Chun-Hua Cheng (Chung Yuan Christian Univ., Taiwan)
Pagepp. 173 - 178
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2B-4 (Time: 14:45 - 15:10)
TitleCongestion-Aware Power Grid Optimization for 3D Circuits Using MIM and CMOS Decoupling Capacitors
AuthorPingqiang Zhou, Karthikk Sridharan, *Sachin S. Sapatnekar (Univ. of Minnesota, United States)
Pagepp. 179 - 184
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2B-5 (Time: 15:10 - 15:35)
TitleIncremental and On-demand Random Walk for Iterative Power Distribution Network Analysis
Author*Yiyu Shi, Wei Yao (Univ. of California, Los Angeles, United States), Jinjun Xiong (IBM, United States), Lei He (Univ. of California, Los Angeles, United States)
Pagepp. 185 - 190
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