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The 14th Asia and South Pacific Design Automation Conference

Session 4B  Beyond Traditional Floorplanning and Placement
Time: 10:15 - 12:20 Wednesday, January 21, 2009
Location: Room 413
Chair: Shigetoshi Nakatake (Univ. of Kitakyushu, Japan)

4B-1 (Time: 10:15 - 10:40)
TitleSignal Skew Aware Floorplanning and Bumper Signal Assignment Technique for Flip-Chip
Author*Cheng-Yu Wang, Wai-Kei Mak (National Tsing Hua Univ., Taiwan)
Pagepp. 341 - 346
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4B-2 (Time: 10:40 - 11:05)
TitleA Novel Thermal Optimization Flow Using Incremental Floorplanning for 3D ICs
AuthorXin Li, *Yuchun Ma, Xianlong Hong (Tsinghua Univ., China)
Pagepp. 347 - 352
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4B-3 (Time: 11:05 - 11:30)
TitleAnalog Placement with Common Centroid and 1-D Symmetry Constraints
Author*Linfu Xiao, Evangeline Young (Chinese Univ. of Hong Kong, Hong Kong)
Pagepp. 353 - 360
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4B-4 (Time: 11:30 - 11:55)
TitleA Multilevel Analytical Placement for 3D ICs
AuthorJason Cong, *Guojie Luo (Univ. of California, Los Angeles, United States)
Pagepp. 361 - 366
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Slides

4B-5 (Time: 11:55 - 12:20)
TitleExploring Adjacency in Floorplanning
AuthorJia Wang, *Hai Zhou (Northwestern Univ., United States)
Pagepp. 367 - 372
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