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The 14th Asia and South Pacific Design Automation Conference

Session 4D  Special Session: Challenges in 3D Integrated Circuit Design
Time: 10:15 - 12:20 Wednesday, January 21, 2009
Location: Room 416+417
Organizer: Sachin Sapatnekar (Univ. of Minnesota, United States)

4D-1 (Time: 10:15 - 10:40)
Title(Invited Paper) Three-Dimensional Integration Technology and Integrated Systems
Author*Mitsumasa Koyanagi, Takafumi Fukushima, Tetsu Tanaka (Tohoku Univ., Japan)
Pagepp. 409 - 415
Detailed information (abstract, keywords, etc)
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4D-2 (Time: 10:40 - 11:05)
Title(Invited Paper) A 3D Prototyping Chip based on a Wafer-level Stacking Technology
Author*Nobuaki Miyakawa (Honda Research Institute, Japan)
Pagepp. 416 - 420
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4D-3 (Time: 11:05 - 11:30)
Title(Invited Paper) CAD Challenges for 3D ICs
AuthorDavid Kung, *Ruchir Puri (IBM Corp., United States)
Pagepp. 421 - 422
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4D-4 (Time: 11:30 - 11:55)
Title(Invited Paper) Addressing Thermal and Power Delivery Bottlenecks in 3D Circuits
Author*Sachin S. Sapatnekar (Univ. of Minnesota, United States)
Pagepp. 423 - 428
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Slides

4D-5 (Time: 11:55 - 12:20)
Title(Invited Paper) The Road to 3D EDA Tool Readiness
Author*Charles Chiang, Subarna Sinha (Synopsys, United States)
Pagepp. 429 - 436
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