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The 14th Asia and South Pacific Design Automation Conference

Session 5A  Energy-Aware System Level Design Methodology
Time: 13:30 - 15:35 Wednesday, January 21, 2009
Location: Room 411+412
Chairs: Chia-Lin Yang (National Taiwan Univ., Taiwan), Juinn-Dar Huang (National Chiao Tung Univ.)

5A-2 (Time: 13:55 - 14:20)
TitleSystem-Level Exploration Tool for Energy-Aware Memory Management in the Design of Multidimensional Signal Processing Systems
Author*Florin Balasa (Southern Utah Univ., United States), Ilie I. Luican (Univ. of Illinois, Chicago, United States), Hongwei Zhu (ARM, Inc., United States), Doru V. Nasui (American International Radio, Inc., United States)
Pagepp. 443 - 448
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5A-3 (Time: 14:20 - 14:45)
TitleSystematic Architecture Exploration based on Optimistic Cycle Estimation for Low Energy Embedded Processors
Author*Ittetsu Taniguchi (Osaka Univ., Japan), Murali Jayapala (IMEC vzw., Belgium), Praveen Raghavan, Francky Catthoor (IMEC vzw./K.U.Leuven, Belgium), Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ., Japan)
Pagepp. 449 - 454
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Slides

5A-4 (Time: 14:45 - 15:10)
TitleA Framework for Estimating NBTI Degradation of Microarchitectural Components
Author*Michael DeBole, Ramakrishnan Krishnan (Pennsylvania State Univ., United States), Varsha Balakrishnan, Wenping Wang (Arizona State Univ., United States), Hong Luo, Yu Wang (Tsinghua Univ., China), Yuan Xie (Pennsylvania State Univ., United States), Yu Cao (Arizona State Univ., United States), N. Vijaykrishnan (Pennsylvania State Univ., United States)
Pagepp. 455 - 460
Detailed information (abstract, keywords, etc)