| Title | Co-Optimization of Memory Access and Task Scheduling on MPSoC Architectures with Multi-Level Memory |
| Author | Yi He (Univ. of Texas, Dallas, U.S.A.), *Chun Jason Xue (City Univ. of Hong Kong, Hong Kong), Cathy Qun Xu, Edwin Sha (Univ. of Texas, Dallas, U.S.A.) |
| Page | pp. 95 - 100 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A New Compilation Technique for SIMD Code Generation across Basic Block Boundaries |
| Author | *Hiroaki Tanaka, Yutaka Ota, Nobu Matsumoto (Toshiba Corp., Japan), Takuji Hieda, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ., Japan) |
| Page | pp. 101 - 106 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | LibGALS: A Library for GALS Systems Design and Modeling |
| Author | *Wei-Tsun Sun, Zoran Salcic, Avinash Malik (Univ. of Auckland, New Zealand) |
| Page | pp. 107 - 112 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Joint Variable Partitioning and Bank Selection Instruction Optimization on Embedded Systems with Multiple Memory Banks |
| Author | *Tiantian Liu, Minming Li, Chun Jason Xue (City Univ. of Hong Kong, Hong Kong) |
| Page | pp. 113 - 118 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |