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The 15th Asia and South Pacific Design Automation Conference

Session 6C  Application-specific NoC Design
Time: 15:30 - 17:10 Wednesday, January 20, 2010
Location: Room 101C
Chairs: Michihiro Koibuchi (NII, Japan), Samar Abdi (Concordia Univ., Canada)

6C-1 (Time: 15:30 - 15:55)
TitleApplication-Specific 3D Network-on-Chip Design Using Simulated Allocation
AuthorPingqiang Zhou (Univ. of Minnesota, U.S.A.), Ping-Hung Yuh (National Taiwan Univ., Taiwan), *Sachin S. Sapatnekar (Univ. of Minnesota, U.S.A.)
Pagepp. 517 - 522
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6C-2 (Time: 15:55 - 16:20)
TitleA3MAP: Architecture-Aware Analytic Mapping for Networks-on-Chip
AuthorWooyoung Jang, *David Z. Pan (Univ. of Texas, Austin, U.S.A.)
Pagepp. 523 - 528
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6C-3 (Time: 16:20 - 16:45)
TitleEfficient Throughput-Guarantees for Latency-Sensitive Networks-On-Chip
Author*Jonas Diemer, Rolf Ernst (Institute of Computer and Network Engineering, TU Braunschweig, Germany), Michael Kauschke (Intel, Germany)
Pagepp. 529 - 534
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6C-4 (Time: 16:45 - 17:10)
TitleFloorplanning and Topology Generation for Application-Specific Network-on-Chip
Author*Bei Yu, Sheqin Dong (Tsinghua Univ., China), Song Chen, Satoshi Goto (Waseda Univ., Japan)
Pagepp. 535 - 540
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