| Title | Thread Affinity Mapping for Irregular Data Access on Shared Cache GPGPU |
| Author | *Hsien-Kai Kuo, Kuan-Ting Chen, Bo-Cheng Charles Lai, Jing-Yang Jou (Department of Electronics Engineering, National Chiao Tung University, Taiwan) |
| Page | pp. 659 - 664 |
| Keyword | GPGPU, irregular data, data parallel computing, memory coalescing, cache contention |
| Abstract | Memory Coalescing and on-chip shared Cache are two effective techniques to alleviate the memory bottleneck in modern GPGPUs. These two techniques are very useful on applications with regular memory accesses. However, they become ineffective on concurrent threads with large numbers of uncoordinated accesses and the potential performance benefit could be significantly degraded. This paper proposes a thread affinity mapping methodology to coordinate the irregular data accesses on shared cache GPGPUs. Based on the proposed affinity metrics, threads are congregated into execution groups which are able to fully exploit the memory coalescing and data sharing within an application. An average of 3.5x runtime speedup is achieved on a Fermi GPGPU. The speedup scales with the sizes of test cases, which makes the proposed methodology an effective and promising solution for the continually increasing complexities of applications in the future many-core systems. |
| Title | Modular Scheduling of Distributed Heterogeneous Time-Triggered Automotive Systems |
| Author | *Martin Lukasiewycz (TUM CREATE Centre for Electromobility, Singapore), Dip Goswami, Reinhard Schneider, Samarjit Chakraborty (Technical University of Munich, Germany) |
| Page | pp. 665 - 670 |
| Keyword | Scheduling, Automotive, Time-triggered, Real-time, Control |
| Abstract | This paper proposes a modular framework that enables a
scheduling for time-triggered distributed embedded systems.
The framework provides a symbolic representation that is
used by an Integer Linear Programming (ILP) solver to determine
a schedule that respects all bus and processor constraints
as well as end-to-end timing constraints. Unlike other
approaches, the proposed technique complies with automotive
specific requirements at system-level and is fully extensible.
Formulations for common time-triggered automotive operating
systems and bus systems are presented. The proposed
model supports the automotive bus systems FlexRay 2.1 and
3.0. For the operating systems, formulations for an eCosbased
non-preemptive component and a preemptive OSEKtime
operating system are introduced. A case study from the
automotive domain gives evidence of the applicability of the
proposed approach by scheduling multiple distributed control
functions concurrently. Finally, a scalability analysis is carried
out with synthetic test cases. |
| Title | RAISE: Reliability-Aware Instruction SchEduling for Unreliable Hardware |
| Author | Semeen Rehman, Muhammad Shafique, Florian Kriebel, *Jörg Henkel (Karlsruhe Institute of Technology (KIT), Germany) |
| Page | pp. 671 - 676 |
| Keyword | Reliability, Reliable Software, Instruction Scheduling, Compiler, Reliability Estimation |
| Abstract | A compile-time Reliability-Aware Instruction SchEduling (RAISE) scheme is presented, which takes into account the spatial and temporal vulnerabilities of different processor resources (pipeline, register file, etc.) used during the execution of different instructions. It reduces the software program’s susceptibility towards failures by minimizing the occupancy cycles of critical instructions inside the pipeline stages in addition to reducing the vulnerable periods of their operands. To facilitate RAISE, a novel technique for static reliability estimation during compilation is presented (i.e. before instructions scheduling). Compared to state-of-the-art reliability-aware instruction schedulers, our scheme provides up to 32.7% reduced software program failures over three different fault rates. |
| Title | On-Line Leakage-Aware Energy Minimization Scheduling for Hard Real-Time Systems |
| Author | Huang Huang, Ming Fan, *Gang Quan (Florida International University, U.S.A.) |
| Page | pp. 677 - 682 |
| Keyword | real-time scheduling, temperature dependency, dynamic voltage and frequency scaling, energy optimization |
| Abstract | As the semiconductor technology proceeds into the deep sub-micron
era, leakage and its dependency with the temperature become critical in dealing with the power/energy minimization problem. In this
paper, we develop an analytical method to estimate energy consumption on-line with the leakage/temperature dependency taken into consideration. Based on this method, we develop an on-line scheduling
algorithm to reduce the overall energy consumption for a hard realtime system scheduled according to the Earliest Deadline First (EDF)
policy. Our experimental results show that the proposed energy estimation method can achieve up to 210X speedup compared with an
existing approach while still maintaining high accuracy. In addition,
with a large number of different test cases, the proposed energy saving scheduling method consistently outperforms two closely related
researches in average by 10% and 14% respectively. |