Title | The Synthesis of Linear Finite State Machine-Based Stochastic Computational Elements |
Author | *Peng Li (University of Minnesota, U.S.A.), Weikang Qian (University of Michigan-Shanghai Jiao Tong University Joint Institute, China), Marc D. Riedel, Kia Bazargan, David J. Lilja (University of Minnesota, U.S.A.) |
Page | pp. 757 - 762 |
Keyword | stochastic computing, fault tolerance, logic synthesis |
Abstract | The Stochastic Computational Element (SCE) uses streams of random bits to perform computation with conventional digital logic gates. It can guarantee reliable computation using unreliable devices. In stochastic computing, the linear Finite State Machine (FSM) can be used to implement some sophisticated functions, such as exponential and tanh function, more efficiently than combinational logic. However, a general approach about how to synthesize a linear FSM-based SCE for a target function is still unknown. In this paper, we will introduce three properties of the linear FSM used in stochastic computing and demonstrate a general approach to synthesize a linear FSM-based SCE for a target function. Experimental results show that our approach produces circuits that are much more tolerant of soft errors than deterministic implementations, while the area-delay product of the circuits are less than that of deterministic implementations. |
Title | Selective Time Borrowing for DSP Pipelines with Hybrid Voltage Control Loop |
Author | *Paul N. Whatmough (ARM Ltd. / University College London, U.K.), Shidhartha Das, David M. Bull (ARM Ltd., U.K.), Izzat Darwazeh (University College London, U.K.) |
Page | pp. 763 - 768 |
Keyword | Dynamic Voltage Scaling, Timing Errors, Razor, DSP |
Abstract | In this paper, we propose the use of a time borrowing window on critical logic paths, over which timing errors can resolve safely without an explicit replay mechanism. We demonstrate that time borrowing can be incorporated into DSP pipelines without increasing the minimum clock period, while removing the metastability risk associated with many previously published approaches to replay-free timing error tolerance. A novel hybrid control approach is used to ensure timing violations do not exceed the safe borrowing window. |
Title | EPROF: An Energy/Performance/Reliability Optimization Framework for Streaming Applications |
Author | *Yavuz Yetim, Sharad Malik, Margaret Martonosi (Princeton University, U.S.A.) |
Page | pp. 769 - 774 |
Keyword | Stochastic Architectures, Scheduling, Parallel Architectures |
Abstract | Computer systems face increasing challenges in simultaneously meeting an application's energy, performance, and reliability goals. While energy and performance tradeoffs have been studied through different dynamic voltage and frequency scaling (DVFS) policies and power management schemes, tradeoffs of energy and performance with reliability have not been studied for general purpose computing. This is particularly relevant for application domains such as multimedia, where some limited application error tolerance can be exploited to reduce energy. In this paper, we present EPROF, an optimization framework based on Mixed-Integer Linear Programming (MILP) that selects possible schedules for running tasks on multiprocessors in order to minimize energy while meeting constraints on application performance and reliability. We consider parallel applications that express (on task graphs) the performance and reliability goals they need to achieve, and that run on chip multiprocessors made up of heterogeneous processor cores that offer different energy/performance/reliability tradeoffs. For the StreamIt benchmarks, EPROF can identify schedules that offer up to 34% energy reduction over a baseline method while achieving the targeted performance and reliability. More broadly, EPROF demonstrates how these three degrees of freedom (energy, performance and reliability) can be flexibly exploited as needed for different applications. |