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The 19th Asia and South Pacific Design Automation Conference

Session 9A  System-Level Verification
Time: 15:50 - 17:30 Thursday, January 23, 2014
Location: Room 300
Chairs: Yinhe Han (Chinese Academy of Sciences, China), Akash Kumar (National Univ. of Singapore, Singapore)

9A-1 (Time: 15:50 - 16:15)
TitleConstraint-Based Platform Variants Specification for Early System Verification
Author*Andreas Burger, Alexander Viehl, Andreas Braun (FZI Research Center for Information Technology, Germany), Finn Haedicke (solvertec/Univ. of Bremen, Germany), Daniel Große (solvertec, Germany), Oliver Bringmann, Wolfgang Rosenstiel (FZI Research Center for Information Technology/Univ. of Tübingen, Germany)
Pagepp. 800 - 805
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9A-2 (Time: 16:15 - 16:40)
TitleA Transaction-Oriented UVM-Based Library for Verification of Analog Behavior
Author*Alexander Wolfgang Rath, Volkan Esen, Wolfgang Ecker (Infineon Technologies AG, Germany)
Pagepp. 806 - 811
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9A-3 (Time: 16:40 - 17:05)
TitleAutomata-Theoretic Modeling of Fixed-Priority Non-Preemptive Scheduling for Formal Timing Verification
Author*Matthias Kauer, Sebastian Steinhorst (TUM CREATE, Singapore), Reinhard Schneider (TU Munich, Germany), Martin Lukasiewycz (TUM CREATE, Singapore), Samarjit Chakraborty (TU Munich, Germany)
Pagepp. 812 - 817
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