| Title | Enhanced LCCG: A Novel Test Clock Generation Scheme for Faster-than-at-Speed Delay Testing |
| Author | *Songwei Pei, Ye Geng (Beijing Univ. of Chemical Tech., China), Huawei Li (Key Laboratory of Computer System and Architecture, Institute of Computing Technology, China), Jun Liu (Hefei Univ. of Tech., China), Song Jin (North China Electric Power Univ., China) |
| Page | pp. 514 - 519 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Efficient 3D-IC On-Chip Test Framework to Embed TSV Testing in Memory BIST |
| Author | Liang-Che Li, Wen-Hsuan Hsu, *Kuen-Jong Lee (National Cheng Kung Univ., Taiwan), Chun-Lung Hsu (ITRI, Taiwan) |
| Page | pp. 520 - 525 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Integrated Temperature-Cycling Acceleration and Test Technique for 3D Stacked ICs |
| Author | *Nima Aghaee, Zebo Peng, Petru Eles (Linköping Univ., Sweden) |
| Page | pp. 526 - 531 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Software-Based Test and Diagnosis of SoCs Using Embedded and Wide-I/O DRAM |
| Author | *Sergej Deutsch, Krishnendu Chakrabarty (Duke Univ., U.S.A.) |
| Page | pp. 532 - 537 |
| Detailed information (abstract, keywords, etc) | |