Call for Designs

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Call for Designs ASP-DAC2017

University LSI Design Contest ASP-DAC 2017

Aims of the Contest:
As a unique feature of ASP-DAC 2017, the University LSI Design Contest will be held. The aim of the Contest is to encourage education and research on VLSI design at universities and other educational organizations. We solicit designs that fit in one or more of the following categories:
(1) Designed, and actually implemented on chips in universities or other educational organizations during the last two years;
(2) Designs that report actual measurements from implementations;
(3) Innovative design prototypes.
Interesting or excellent designs selected will be honored by providing the opportunities for presentation in a special session at the conference. Award(s) will be given to a few numbers of outstanding designs, selected from those presented at the conference.

Areas of Design:
Application areas or types of circuits of the original LSI circuit designs include (but are not limited to):
(1) Analog, RF and Mixed-Signal Circuits, (2) Digital Signal Processing, (3) Microprocessors, (4) Custom ASIC. Methods or technology used for implementation include:
(a) Full Custom and Cell-Based LSIs, (b) Gate Arrays, (c) FPGA/PLDs.

Submission of Design Descriptions:
A camera-ready summary is requested to be prepared within 2 pages including figures, tables, and references. It is strongly recommended that measured experimental results and a chip micrograph are included in the summary. Please do not submit the same paper as a regular paper.
Specification of the submission format will be available at
https://www.aspdac.com/aspdac2017/

Deadline for summary: 5PM AOE (Anywhere on earth) July 8 (Fri), 2016
*Authors should finish initial submission by the original deadline (July 8, 5:00 PM AOE) and can update the manuscript by July 15, 5:00 PM AOE (Anywhere on Earth, GMT/UTC -12:00 hour). NO NEW SUBMISSION is allowed after July 8, 5:00 PM AOE.
Notification of acceptance: Sep. 12 (Mon), 2016
Deadline for camera-ready: 5PM AOE (Anywhere on earth) Nov. 7 (Mon), 2016

Review:
Submitted designs will be reviewed by the Design Contest Committee in a process similar to the review process for the technical papers. The following criteria will be applied in the selection of designs:
(1) Reliability of design and implementation, (2) Quality of implementation, (3) Performance of the design, (4) Novelty of application, algorithm, architecture, (5) Others.
Interesting or excellent designs selected will be presented at a special session of the conference.

Presentation:
An author of each selected design will be required to make a short presentation at a special session of ASP-DAC 2017.
It is mandatory that at least one co-author per accepted paper registers the conference at the speaker’s registration or full-time-student registration rate.
A digest of each design to be presented will be included in the conference proceedings.

Contact Email: aspdac2017-udc [at] mls.aspdac.com
ASP-DAC 2017 Chairs
General Chair: Naofumi Takagi (Kyoto University, Japan)
Technical Program Chair: David Z. Pan (University of Texas at Austin, USA)
Design Contest Co-Chairs: Hiroyuki Ito (Tokyo Institute of Technology, Japan)
Noriyuki Miura (Kobe University, Japan)

Prospective Sponsors:
ACM SIGDA, IEEE CASS, IEEE CEDA, IEICE ESS, IPSJ SIGSLDM

Last Updated on: 11 20, 2015