ACM SIGDA Student Research Forum at ASP-DAC 2026
(SRF@ASP-DAC 2026)
Accepted Posters
| Poster ID | Title | Authors and Affiliation |
| 1 | Efficient Compute-in-Memory based Accelerators for Point Cloud Neural Networks | Xipeng Lin (The Hong Kong University of Science and Technology, (Guangzhou)) |
| 2 | Towards Robust and Efficient Machine Learning Systems Against Uncertainty | Dongning Ma (Villanova University) |
| 3 | Gau++: Algorithm and Hardware Co-Optimized Accelerator Towards Efficient 3D Gaussian Splatting Deployment and Application | Lizhou Wu (Fudan University) |
| 4 | Research on Energy-Efficiency-Driven Design-Technology Co-Optimization Methods | Tianliang Ma (Shanghai Jiao Tong University) |
| 5 | A Study of Performance Optimization Techniques of Digital Integrated Circuit Test Generation System | Zhiteng Chao (Chinese Academy of Sciences) |
| 6 | Design of Predictable and Reliable Computing Architecture for Robotic Systems:Includes work accepted at GLSVLSI ’25, ICRA ’25 and JFR | Wenhao Sun (Institute of Computing Technology, Chinese Academy of Sciences) |
| 7 | Mask Optimization in EDA: Mathematical Approaches | Ziyang Yu (The Chinese University of Hong Kong) |
| 8 | Fully Digital Hybrid Compute-in-ROM/SRAM Architecture for On-Chip Deployment of Large-Scale Deep Neural Networks | Tianyi Yu (Tsinghua University) |
| 9 | Multi-objective Full-Process Design Space Exploration for Chiplet Heterogeneous Integration | Shixin Chen (The Chinese University of Hong Kong) |
| 10 | Physically Aware Synthesis: From Optimization and Technology Mapping to Logic Resynthesis | Hongyang Pan (Fudan University) |
| 11 | Ferroelectric Compute-in-Memory Framework for Combinatorial Optimization Problems | Yu Qian (Zhejiang University) |
| 12 | Bridging Uncertainty in EDA with GNNs: Harnessing Consistency As the Key | Ziyi Wang (Chinese University of Hong Kong) |
| 13 | Towards Performance-driven Analog Layout Design | Peng Xu (The Chinese University of Hong Kong) |
| 14 | E2S: Exploiting Effective, Efficient, and Secure Brain-Inspired Computing System | Haomin Li (Shanghai Jiao Tong University) |
| 15 | Optimizing Design Closure with Learning-Driven Approaches | Xinyun Zhang (The Chinese University of Hong Kong) |
| 16 | Reliable and Secure Analog Circuit Design and Optimization for Ultra-Resource-Constrained Edge Intelligence | Priyanjana Pal (Karlsruhe Institute of Techology Germany) |
| 17 | Design Tools for Adiabatic Superconducting Logic Circuits Toward Energy-Efficient Computing | Rongliang Fu (The Chinese University of Hong Kong) |
| 18 | Multiphysics Simulation and Optimization for Chiplet Integration Systems | Qipan Wang (Peking University) |
| 19 | Towards Better VLSI Mask Optimization | Su Zheng (The Chinese University of Hong Kong) |
| 20 | Modernizing Storage System Designs with Emerging Storage Abstractions | Yingjia Wang (The Chinese University of Hong Kong) |
| 21 | A Study of Hardware Accelerator Design Methodologies for Lattice-Based Cryptographic Algorithms | Jianan Mu (Institute of Computing Technology, Chinese Academy of Sciences) |
| 22 | Scalable and Multimodal Circuit Representation Learning | Zhengyuan Shi (The Chinese University of Hong Kong) |
| 23 | Intelligence-Native Integrated Systems: A Vertical Approach from Automated CIM to Neural SoCs | Fengshi Tian (Hong Kong University of Science and Technology) |
| 24 | Empowering Chip Design Optimization and Verification with CPU-GPU Heterogeneous Computing | Zizheng Guo (Peking University) |
| 25 | Intelligent Computational Lithography Across Masks, Sources, and Geometries | Xiaoxiao Liang (The Hong Kong University of Science and Technology, (Guangzhou)) |
| 26 | Hardware-Software Co-Design Methodology for Digital SRAM-based Processing-in-Memory Architectures | Cenlin Duan (Beihang University) |
| 27 | Software-Hardware Co-design Methodology for Compute-In-Memory Architecture Evaluation and Exploration | Yingjie Qi (Beihang University) |
| 28 | Multi-Dimensional Hardware Architecture for Artificial Intelligence | Jun Liu (Shanghai Jiao Tong University) |
| 29 | ECS: Exploiting Encoding-Centric, Efficient and Secure Computing System | Ning Yang (Shanghai Jiao Tong University) |
Sponsors
Cadence Design Systems, Inc.
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary products from chips to systems, chemicals to drugs, and specification to manufacturing for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and life sciences.
We pride ourselves on creating and sustaining a company culture that drives innovation and business success. Cadence is consistently recognized as a Great Place to Work around the world, including as one of the Fortune “100 Best Companies to Work For”, Asia's Best Workplaces, and World's Best Multinational Workplaces. We look forward to seeing you at the SIGDA Student Research Forum, stop by to learn more about Cadence and to network with industry experts and Cadence executives.
POSTER GUIDELINES
SRF presenters are required to present a poster describing their workduring the designated SRF session to discuss their work with interested attendees. Each author is allocated a 1,189mm tall x 841mm wide (46.81'' tall x 33.11'' wide) area for a poster in A0 format. Poster sessions will run for one and half hour. Poster authors are welcome to distribute additional material to interested attendees at the poster session. Such material can include extended abstracts and whitepapers.
- One poster board is allocated to each presentation.
- Posters must be mounted using nano gel provided by the organizing committee.
- Do not use foam core or any other thick/heavy material for your poster.
- Poster presenters are responsible for printing their poster and carrying or shipping it to the conference.
- Submit electrical data of poster to the system (see below) as a backup.
- Submission Deadline: November 25, 2025 (AOE)
- Date of Acceptance Notification: December
2010, 2025 (AOE) - Poster Submission Deadline: January 5, 2026 (AOE)
- Poster submission website: https://iconf.young.ac.cn/6EzRT
- Forum Date: January 20 (Tue.), 2026
Contact:
For queries, please send an email to Prof. Zhiyao Xie (eezhiyao@ust.hk).
Please include "SRF@ASP-DAC 2026" in the subject of your email.